cmd/internal/rsc.io: delete

The code is now in cmd/vendor/golang.org/x/arch.

Change-Id: I518d48c21b0d7fed914552b89ee41411f088456b
Reviewed-on: https://go-review.googlesource.com/14021Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>

src/cmd/internal/rsc.io/arm/armasm/Makefile

-tables.go: ../armmap/map.go ../arm.csv 
-	go run ../armmap/map.go -fmt=decoder ../arm.csv >_tables.go && gofmt _tables.go >tables.go && rm _tables.go

src/cmd/internal/rsc.io/arm/armasm/decode_test.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package armasm
-
-import (
-	"encoding/hex"
-	"io/ioutil"
-	"strconv"
-	"strings"
-	"testing"
-)
-
-func TestDecode(t *testing.T) {
-	data, err := ioutil.ReadFile("testdata/decode.txt")
-	if err != nil {
-		t.Fatal(err)
-	}
-	all := string(data)
-	for strings.Contains(all, "\t\t") {
-		all = strings.Replace(all, "\t\t", "\t", -1)
-	}
-	for _, line := range strings.Split(all, "\n") {
-		line = strings.TrimSpace(line)
-		if line == "" || strings.HasPrefix(line, "#") {
-			continue
-		}
-		f := strings.SplitN(line, "\t", 4)
-		i := strings.Index(f[0], "|")
-		if i < 0 {
-			t.Errorf("parsing %q: missing | separator", f[0])
-			continue
-		}
-		if i%2 != 0 {
-			t.Errorf("parsing %q: misaligned | separator", f[0])
-		}
-		size := i / 2
-		code, err := hex.DecodeString(f[0][:i] + f[0][i+1:])
-		if err != nil {
-			t.Errorf("parsing %q: %v", f[0], err)
-			continue
-		}
-		mode, err := strconv.Atoi(f[1])
-		if err != nil {
-			t.Errorf("invalid mode %q in: %s", f[1], line)
-			continue
-		}
-		syntax, asm := f[2], f[3]
-		inst, err := Decode(code, Mode(mode))
-		var out string
-		if err != nil {
-			out = "error: " + err.Error()
-		} else {
-			switch syntax {
-			case "gnu":
-				out = GNUSyntax(inst)
-			case "plan9":
-				out = Plan9Syntax(inst, 0, nil, nil)
-			default:
-				t.Errorf("unknown syntax %q", syntax)
-				continue
-			}
-		}
-		if out != asm || inst.Len != size {
-			t.Errorf("Decode(%s) [%s] = %s, %d, want %s, %d", f[0], syntax, out, inst.Len, asm, size)
-		}
-	}
-}

src/cmd/internal/rsc.io/arm/armasm/gnu.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package armasm
-
-import (
-	"bytes"
-	"fmt"
-	"strings"
-)
-
-var saveDot = strings.NewReplacer(
-	".F16", "_dot_F16",
-	".F32", "_dot_F32",
-	".F64", "_dot_F64",
-	".S32", "_dot_S32",
-	".U32", "_dot_U32",
-	".FXS", "_dot_S",
-	".FXU", "_dot_U",
-	".32", "_dot_32",
-)
-
-// GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils.
-// This form typically matches the syntax defined in the ARM Reference Manual.
-func GNUSyntax(inst Inst) string {
-	var buf bytes.Buffer
-	op := inst.Op.String()
-	op = saveDot.Replace(op)
-	op = strings.Replace(op, ".", "", -1)
-	op = strings.Replace(op, "_dot_", ".", -1)
-	op = strings.ToLower(op)
-	buf.WriteString(op)
-	sep := " "
-	for i, arg := range inst.Args {
-		if arg == nil {
-			break
-		}
-		text := gnuArg(&inst, i, arg)
-		if text == "" {
-			continue
-		}
-		buf.WriteString(sep)
-		sep = ", "
-		buf.WriteString(text)
-	}
-	return buf.String()
-}
-
-func gnuArg(inst *Inst, argIndex int, arg Arg) string {
-	switch inst.Op &^ 15 {
-	case LDRD_EQ, LDREXD_EQ, STRD_EQ:
-		if argIndex == 1 {
-			// second argument in consecutive pair not printed
-			return ""
-		}
-	case STREXD_EQ:
-		if argIndex == 2 {
-			// second argument in consecutive pair not printed
-			return ""
-		}
-	}
-
-	switch arg := arg.(type) {
-	case Imm:
-		switch inst.Op &^ 15 {
-		case BKPT_EQ:
-			return fmt.Sprintf("%#04x", uint32(arg))
-		case SVC_EQ:
-			return fmt.Sprintf("%#08x", uint32(arg))
-		}
-		return fmt.Sprintf("#%d", int32(arg))
-
-	case ImmAlt:
-		return fmt.Sprintf("#%d, %d", arg.Val, arg.Rot)
-
-	case Mem:
-		R := gnuArg(inst, -1, arg.Base)
-		X := ""
-		if arg.Sign != 0 {
-			X = ""
-			if arg.Sign < 0 {
-				X = "-"
-			}
-			X += gnuArg(inst, -1, arg.Index)
-			if arg.Shift == ShiftLeft && arg.Count == 0 {
-				// nothing
-			} else if arg.Shift == RotateRightExt {
-				X += ", rrx"
-			} else {
-				X += fmt.Sprintf(", %s #%d", strings.ToLower(arg.Shift.String()), arg.Count)
-			}
-		} else {
-			X = fmt.Sprintf("#%d", arg.Offset)
-		}
-
-		switch arg.Mode {
-		case AddrOffset:
-			if X == "#0" {
-				return fmt.Sprintf("[%s]", R)
-			}
-			return fmt.Sprintf("[%s, %s]", R, X)
-		case AddrPreIndex:
-			return fmt.Sprintf("[%s, %s]!", R, X)
-		case AddrPostIndex:
-			return fmt.Sprintf("[%s], %s", R, X)
-		case AddrLDM:
-			if X == "#0" {
-				return R
-			}
-		case AddrLDM_WB:
-			if X == "#0" {
-				return R + "!"
-			}
-		}
-		return fmt.Sprintf("[%s Mode(%d) %s]", R, int(arg.Mode), X)
-
-	case PCRel:
-		return fmt.Sprintf(".%+#x", int32(arg)+4)
-
-	case Reg:
-		switch inst.Op &^ 15 {
-		case LDREX_EQ:
-			if argIndex == 0 {
-				return fmt.Sprintf("r%d", int32(arg))
-			}
-		}
-		switch arg {
-		case R10:
-			return "sl"
-		case R11:
-			return "fp"
-		case R12:
-			return "ip"
-		}
-
-	case RegList:
-		var buf bytes.Buffer
-		fmt.Fprintf(&buf, "{")
-		sep := ""
-		for i := 0; i < 16; i++ {
-			if arg&(1<<uint(i)) != 0 {
-				fmt.Fprintf(&buf, "%s%s", sep, gnuArg(inst, -1, Reg(i)))
-				sep = ", "
-			}
-		}
-		fmt.Fprintf(&buf, "}")
-		return buf.String()
-
-	case RegShift:
-		if arg.Shift == ShiftLeft && arg.Count == 0 {
-			return gnuArg(inst, -1, arg.Reg)
-		}
-		if arg.Shift == RotateRightExt {
-			return gnuArg(inst, -1, arg.Reg) + ", rrx"
-		}
-		return fmt.Sprintf("%s, %s #%d", gnuArg(inst, -1, arg.Reg), strings.ToLower(arg.Shift.String()), arg.Count)
-
-	case RegShiftReg:
-		return fmt.Sprintf("%s, %s %s", gnuArg(inst, -1, arg.Reg), strings.ToLower(arg.Shift.String()), gnuArg(inst, -1, arg.RegCount))
-
-	}
-	return strings.ToLower(arg.String())
-}

src/cmd/internal/rsc.io/arm/armasm/inst.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package armasm
-
-import (
-	"bytes"
-	"fmt"
-)
-
-// A Mode is an instruction execution mode.
-type Mode int
-
-const (
-	_ Mode = iota
-	ModeARM
-	ModeThumb
-)
-
-func (m Mode) String() string {
-	switch m {
-	case ModeARM:
-		return "ARM"
-	case ModeThumb:
-		return "Thumb"
-	}
-	return fmt.Sprintf("Mode(%d)", int(m))
-}
-
-// An Op is an ARM opcode.
-type Op uint16
-
-// NOTE: The actual Op values are defined in tables.go.
-// They are chosen to simplify instruction decoding and
-// are not a dense packing from 0 to N, although the
-// density is high, probably at least 90%.
-
-func (op Op) String() string {
-	if op >= Op(len(opstr)) || opstr[op] == "" {
-		return fmt.Sprintf("Op(%d)", int(op))
-	}
-	return opstr[op]
-}
-
-// An Inst is a single instruction.
-type Inst struct {
-	Op   Op     // Opcode mnemonic
-	Enc  uint32 // Raw encoding bits.
-	Len  int    // Length of encoding in bytes.
-	Args Args   // Instruction arguments, in ARM manual order.
-}
-
-func (i Inst) String() string {
-	var buf bytes.Buffer
-	buf.WriteString(i.Op.String())
-	for j, arg := range i.Args {
-		if arg == nil {
-			break
-		}
-		if j == 0 {
-			buf.WriteString(" ")
-		} else {
-			buf.WriteString(", ")
-		}
-		buf.WriteString(arg.String())
-	}
-	return buf.String()
-}
-
-// An Args holds the instruction arguments.
-// If an instruction has fewer than 4 arguments,
-// the final elements in the array are nil.
-type Args [4]Arg
-
-// An Arg is a single instruction argument, one of these types:
-// Endian, Imm, Mem, PCRel, Reg, RegList, RegShift, RegShiftReg.
-type Arg interface {
-	IsArg()
-	String() string
-}
-
-type Float32Imm float32
-
-func (Float32Imm) IsArg() {}
-
-func (f Float32Imm) String() string {
-	return fmt.Sprintf("#%v", float32(f))
-}
-
-type Float64Imm float32
-
-func (Float64Imm) IsArg() {}
-
-func (f Float64Imm) String() string {
-	return fmt.Sprintf("#%v", float64(f))
-}
-
-// An Imm is an integer constant.
-type Imm uint32
-
-func (Imm) IsArg() {}
-
-func (i Imm) String() string {
-	return fmt.Sprintf("#%#x", uint32(i))
-}
-
-// A ImmAlt is an alternate encoding of an integer constant.
-type ImmAlt struct {
-	Val uint8
-	Rot uint8
-}
-
-func (ImmAlt) IsArg() {}
-
-func (i ImmAlt) Imm() Imm {
-	v := uint32(i.Val)
-	r := uint(i.Rot)
-	return Imm(v>>r | v<<(32-r))
-}
-
-func (i ImmAlt) String() string {
-	return fmt.Sprintf("#%#x, %d", i.Val, i.Rot)
-}
-
-// A Label is a text (code) address.
-type Label uint32
-
-func (Label) IsArg() {}
-
-func (i Label) String() string {
-	return fmt.Sprintf("%#x", uint32(i))
-}
-
-// A Reg is a single register.
-// The zero value denotes R0, not the absence of a register.
-type Reg uint8
-
-const (
-	R0 Reg = iota
-	R1
-	R2
-	R3
-	R4
-	R5
-	R6
-	R7
-	R8
-	R9
-	R10
-	R11
-	R12
-	R13
-	R14
-	R15
-
-	S0
-	S1
-	S2
-	S3
-	S4
-	S5
-	S6
-	S7
-	S8
-	S9
-	S10
-	S11
-	S12
-	S13
-	S14
-	S15
-	S16
-	S17
-	S18
-	S19
-	S20
-	S21
-	S22
-	S23
-	S24
-	S25
-	S26
-	S27
-	S28
-	S29
-	S30
-	S31
-
-	D0
-	D1
-	D2
-	D3
-	D4
-	D5
-	D6
-	D7
-	D8
-	D9
-	D10
-	D11
-	D12
-	D13
-	D14
-	D15
-	D16
-	D17
-	D18
-	D19
-	D20
-	D21
-	D22
-	D23
-	D24
-	D25
-	D26
-	D27
-	D28
-	D29
-	D30
-	D31
-
-	APSR
-	APSR_nzcv
-	FPSCR
-
-	SP = R13
-	LR = R14
-	PC = R15
-)
-
-func (Reg) IsArg() {}
-
-func (r Reg) String() string {
-	switch r {
-	case APSR:
-		return "APSR"
-	case APSR_nzcv:
-		return "APSR_nzcv"
-	case FPSCR:
-		return "FPSCR"
-	case SP:
-		return "SP"
-	case PC:
-		return "PC"
-	case LR:
-		return "LR"
-	}
-	if R0 <= r && r <= R15 {
-		return fmt.Sprintf("R%d", int(r-R0))
-	}
-	if S0 <= r && r <= S31 {
-		return fmt.Sprintf("S%d", int(r-S0))
-	}
-	if D0 <= r && r <= D31 {
-		return fmt.Sprintf("D%d", int(r-D0))
-	}
-	return fmt.Sprintf("Reg(%d)", int(r))
-}
-
-// A RegX represents a fraction of a multi-value register.
-// The Index field specifies the index number,
-// but the size of the fraction is not specified.
-// It must be inferred from the instruction and the register type.
-// For example, in a VMOV instruction, RegX{D5, 1} represents
-// the top 32 bits of the 64-bit D5 register.
-type RegX struct {
-	Reg   Reg
-	Index int
-}
-
-func (RegX) IsArg() {}
-
-func (r RegX) String() string {
-	return fmt.Sprintf("%s[%d]", r.Reg, r.Index)
-}
-
-// A RegList is a register list.
-// Bits at indexes x = 0 through 15 indicate whether the corresponding Rx register is in the list.
-type RegList uint16
-
-func (RegList) IsArg() {}
-
-func (r RegList) String() string {
-	var buf bytes.Buffer
-	fmt.Fprintf(&buf, "{")
-	sep := ""
-	for i := 0; i < 16; i++ {
-		if r&(1<<uint(i)) != 0 {
-			fmt.Fprintf(&buf, "%s%s", sep, Reg(i).String())
-			sep = ","
-		}
-	}
-	fmt.Fprintf(&buf, "}")
-	return buf.String()
-}
-
-// An Endian is the argument to the SETEND instruction.
-type Endian uint8
-
-const (
-	LittleEndian Endian = 0
-	BigEndian    Endian = 1
-)
-
-func (Endian) IsArg() {}
-
-func (e Endian) String() string {
-	if e != 0 {
-		return "BE"
-	}
-	return "LE"
-}
-
-// A Shift describes an ARM shift operation.
-type Shift uint8
-
-const (
-	ShiftLeft        Shift = 0 // left shift
-	ShiftRight       Shift = 1 // logical (unsigned) right shift
-	ShiftRightSigned Shift = 2 // arithmetic (signed) right shift
-	RotateRight      Shift = 3 // right rotate
-	RotateRightExt   Shift = 4 // right rotate through carry (Count will always be 1)
-)
-
-var shiftName = [...]string{
-	"LSL", "LSR", "ASR", "ROR", "RRX",
-}
-
-func (s Shift) String() string {
-	if s < 5 {
-		return shiftName[s]
-	}
-	return fmt.Sprintf("Shift(%d)", int(s))
-}
-
-// A RegShift is a register shifted by a constant.
-type RegShift struct {
-	Reg   Reg
-	Shift Shift
-	Count uint8
-}
-
-func (RegShift) IsArg() {}
-
-func (r RegShift) String() string {
-	return fmt.Sprintf("%s %s #%d", r.Reg, r.Shift, r.Count)
-}
-
-// A RegShiftReg is a register shifted by a register.
-type RegShiftReg struct {
-	Reg      Reg
-	Shift    Shift
-	RegCount Reg
-}
-
-func (RegShiftReg) IsArg() {}
-
-func (r RegShiftReg) String() string {
-	return fmt.Sprintf("%s %s %s", r.Reg, r.Shift, r.RegCount)
-}
-
-// A PCRel describes a memory address (usually a code label)
-// as a distance relative to the program counter.
-// TODO(rsc): Define which program counter (PC+4? PC+8? PC?).
-type PCRel int32
-
-func (PCRel) IsArg() {}
-
-func (r PCRel) String() string {
-	return fmt.Sprintf("PC%+#x", int32(r))
-}
-
-// An AddrMode is an ARM addressing mode.
-type AddrMode uint8
-
-const (
-	_             AddrMode = iota
-	AddrPostIndex          // [R], X – use address R, set R = R + X
-	AddrPreIndex           // [R, X]! – use address R + X, set R = R + X
-	AddrOffset             // [R, X] – use address R + X
-	AddrLDM                // R – [R] but formats as R, for LDM/STM only
-	AddrLDM_WB             // R! - [R], X where X is instruction-specific amount, for LDM/STM only
-)
-
-// A Mem is a memory reference made up of a base R and index expression X.
-// The effective memory address is R or R+X depending on AddrMode.
-// The index expression is X = Sign*(Index Shift Count) + Offset,
-// but in any instruction either Sign = 0 or Offset = 0.
-type Mem struct {
-	Base   Reg
-	Mode   AddrMode
-	Sign   int8
-	Index  Reg
-	Shift  Shift
-	Count  uint8
-	Offset int16
-}
-
-func (Mem) IsArg() {}
-
-func (m Mem) String() string {
-	R := m.Base.String()
-	X := ""
-	if m.Sign != 0 {
-		X = "+"
-		if m.Sign < 0 {
-			X = "-"
-		}
-		X += m.Index.String()
-		if m.Shift != ShiftLeft || m.Count != 0 {
-			X += fmt.Sprintf(", %s #%d", m.Shift, m.Count)
-		}
-	} else {
-		X = fmt.Sprintf("#%d", m.Offset)
-	}
-
-	switch m.Mode {
-	case AddrOffset:
-		if X == "#0" {
-			return fmt.Sprintf("[%s]", R)
-		}
-		return fmt.Sprintf("[%s, %s]", R, X)
-	case AddrPreIndex:
-		return fmt.Sprintf("[%s, %s]!", R, X)
-	case AddrPostIndex:
-		return fmt.Sprintf("[%s], %s", R, X)
-	case AddrLDM:
-		if X == "#0" {
-			return R
-		}
-	case AddrLDM_WB:
-		if X == "#0" {
-			return R + "!"
-		}
-	}
-	return fmt.Sprintf("[%s Mode(%d) %s]", R, int(m.Mode), X)
-}

src/cmd/internal/rsc.io/arm/armasm/objdump_test.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package armasm
-
-import (
-	"encoding/binary"
-	"strings"
-	"testing"
-)
-
-func TestObjdumpARMTestdata(t *testing.T) { testObjdumpARM(t, testdataCases(t)) }
-func TestObjdumpARMManual(t *testing.T)   { testObjdumpARM(t, hexCases(t, objdumpManualTests)) }
-func TestObjdumpARMCond(t *testing.T)     { testObjdumpARM(t, condCases(t)) }
-func TestObjdumpARMUncond(t *testing.T)   { testObjdumpARM(t, uncondCases(t)) }
-func TestObjdumpARMVFP(t *testing.T)      { testObjdumpARM(t, vfpCases(t)) }
-
-// objdumpManualTests holds test cases that will be run by TestObjdumpARMManual.
-// If you are debugging a few cases that turned up in a longer run, it can be useful
-// to list them here and then use -run=Manual, particularly with tracing enabled.
-// Note that these are byte sequences, so they must be reversed from the usual
-// word presentation.
-var objdumpManualTests = `
-00000000
-`
-
-// allowedMismatchObjdump reports whether the mismatch between text and dec
-// should be allowed by the test.
-func allowedMismatchObjdump(text string, size int, inst *Inst, dec ExtInst) bool {
-	if hasPrefix(text, "error:") {
-		if hasPrefix(dec.text, unsupported...) || strings.Contains(dec.text, "invalid:") || strings.HasSuffix(dec.text, "^") || strings.Contains(dec.text, "f16.f64") || strings.Contains(dec.text, "f64.f16") {
-			return true
-		}
-		// word 4320F02C: libopcodes says 'nopmi {44}'.
-		if hasPrefix(dec.text, "nop") && strings.Contains(dec.text, "{") {
-			return true
-		}
-	}
-
-	if hasPrefix(dec.text, "error:") && text == "undef" && inst.Enc == 0xf7fabcfd {
-		return true
-	}
-
-	// word 00f02053: libopcodes says 'noppl {0}'.
-	if hasPrefix(dec.text, "nop") && hasPrefix(text, "nop") && dec.text == text+" {0}" {
-		return true
-	}
-
-	// word F57FF04F. we say 'dsb #15', libopcodes says 'dsb sy'.
-	if hasPrefix(text, "dsb") && hasPrefix(dec.text, "dsb") {
-		return true
-	}
-	// word F57FF06F. we say 'isb #15', libopcodes says 'isb sy'.
-	if hasPrefix(text, "isb") && hasPrefix(dec.text, "isb") {
-		return true
-	}
-	// word F57FF053. we say 'dmb #3', libopcodes says 'dmb osh'.
-	if hasPrefix(text, "dmb") && hasPrefix(dec.text, "dmb") {
-		return true
-	}
-
-	// word 992D0000. push/stmdb with no registers (undefined).
-	// we say 'stmdbls sp!, {}', libopcodes says 'pushls {}'.
-	if hasPrefix(text, "stmdb") && hasPrefix(dec.text, "push") && strings.Contains(text, "{}") && strings.Contains(dec.text, "{}") {
-		return true
-	}
-
-	// word 28BD0000. pop/ldm with no registers (undefined).
-	// we say 'ldmcs sp!, {}', libopcodes says 'popcs {}'.
-	if hasPrefix(text, "ldm") && hasPrefix(dec.text, "pop") && strings.Contains(text, "{}") && strings.Contains(dec.text, "{}") {
-		return true
-	}
-
-	// word 014640F0.
-	// libopcodes emits #-0 for negative zero; we don't.
-	if strings.Replace(dec.text, "#-0", "#0", -1) == text || strings.Replace(dec.text, ", #-0", "", -1) == text {
-		return true
-	}
-
-	// word 91EF90F0. we say 'strdls r9, [pc, #0]!' but libopcodes says 'strdls r9, [pc]'.
-	// word D16F60F0. we say 'strdle r6, [pc, #0]!' but libopcodes says 'strdle r6, [pc, #-0]'.
-	if strings.Replace(text, ", #0]!", "]", -1) == strings.Replace(dec.text, ", #-0]", "]", -1) {
-		return true
-	}
-
-	// word 510F4000. we say apsr, libopcodes says CPSR.
-	if strings.Replace(dec.text, "CPSR", "apsr", -1) == text {
-		return true
-	}
-
-	// word 06A4B059.
-	// for ssat and usat, libopcodes decodes asr #0 as asr #0 but the manual seems to say it should be asr #32.
-	// There is never an asr #0.
-	if strings.Replace(dec.text, ", asr #0", ", asr #32", -1) == text {
-		return true
-	}
-
-	if len(dec.enc) >= 4 {
-		raw := binary.LittleEndian.Uint32(dec.enc[:4])
-
-		// word 21FFF0B5.
-		// the manual is clear that this is pre-indexed mode (with !) but libopcodes generates post-index (without !).
-		if raw&0x01200000 == 0x01200000 && strings.Replace(text, "!", "", -1) == dec.text {
-			return true
-		}
-
-		// word C100543E: libopcodes says tst, but no evidence for that.
-		if strings.HasPrefix(dec.text, "tst") && raw&0x0ff00000 != 0x03100000 && raw&0x0ff00000 != 0x01100000 {
-			return true
-		}
-
-		// word C3203CE8: libopcodes says teq, but no evidence for that.
-		if strings.HasPrefix(dec.text, "teq") && raw&0x0ff00000 != 0x03300000 && raw&0x0ff00000 != 0x01300000 {
-			return true
-		}
-
-		// word D14C552E: libopcodes says cmp but no evidence for that.
-		if strings.HasPrefix(dec.text, "cmp") && raw&0x0ff00000 != 0x03500000 && raw&0x0ff00000 != 0x01500000 {
-			return true
-		}
-
-		// word 2166AA4A: libopcodes says cmn but no evidence for that.
-		if strings.HasPrefix(dec.text, "cmn") && raw&0x0ff00000 != 0x03700000 && raw&0x0ff00000 != 0x01700000 {
-			return true
-		}
-
-		// word E70AEEEF: libopcodes says str but no evidence for that.
-		if strings.HasPrefix(dec.text, "str") && len(dec.text) >= 5 && (dec.text[3] == ' ' || dec.text[5] == ' ') && raw&0x0e500018 != 0x06000000 && raw&0x0e500000 != 0x0400000 {
-			return true
-		}
-
-		// word B0AF48F4: libopcodes says strd but P=0,W=1 which is unpredictable.
-		if hasPrefix(dec.text, "ldr", "str") && raw&0x01200000 == 0x00200000 {
-			return true
-		}
-
-		// word B6CC1C76: libopcodes inexplicably says 'uxtab16lt r1, ip, r6, ROR #24' instead of 'uxtab16lt r1, ip, r6, ror #24'
-		if strings.ToLower(dec.text) == text {
-			return true
-		}
-
-		// word F410FDA1: libopcodes says PLDW but the manual is clear that PLDW is F5/F7, not F4.
-		// word F7D0FB17: libopcodes says PLDW but the manual is clear that PLDW has 0x10 clear
-		if hasPrefix(dec.text, "pld") && raw&0xfd000010 != 0xf5000000 {
-			return true
-		}
-
-		// word F650FE14: libopcodes says PLI but the manual is clear that PLI has 0x10 clear
-		if hasPrefix(dec.text, "pli") && raw&0xff000010 != 0xf6000000 {
-			return true
-		}
-	}
-
-	return false
-}
-
-// Instructions known to libopcodes (or xed) but not to us.
-// Most of these are floating point coprocessor instructions.
-var unsupported = strings.Fields(`
-	abs
-	acs
-	adf
-	aes
-	asn
-	atn
-	cdp
-	cf
-	cmf
-	cnf
-	cos
-	cps
-	crc32
-	dvf
-	eret
-	exp
-	fadd
-	fcmp
-	fcpy
-	fcvt
-	fdiv
-	fdv
-	fix
-	fld
-	flt
-	fmac
-	fmd
-	fml
-	fmr
-	fms
-	fmul
-	fmx
-	fneg
-	fnm
-	frd
-	fsit
-	fsq
-	fst
-	fsu
-	fto
-	fui
-	hlt
-	hvc
-	lda
-	ldc
-	ldf
-	lfm
-	lgn
-	log
-	mar
-	mcr
-	mcrr
-	mia
-	mnf
-	mra
-	mrc
-	mrrc
-	mrs
-	msr
-	msr
-	muf
-	mvf
-	nrm
-	pol
-	pow
-	rdf
-	rfc
-	rfe
-	rfs
-	rmf
-	rnd
-	rpw
-	rsf
-	sdiv
-	sev
-	sfm
-	sha1
-	sha256
-	sin
-	smc
-	sqt
-	srs
-	stc
-	stf
-	stl
-	suf
-	tan
-	udf
-	udiv
-	urd
-	vfma
-	vfms
-	vfnma
-	vfnms
-	vrint
-	wfc
-	wfs
-`)

src/cmd/internal/rsc.io/arm/armasm/objdumpext_test.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-// Copied and simplified from rsc.io/x86/x86asm/objdumpext_test.go.
-
-package armasm
-
-import (
-	"bytes"
-	"debug/elf"
-	"encoding/binary"
-	"fmt"
-	"io"
-	"log"
-	"os"
-	"strconv"
-	"strings"
-	"testing"
-)
-
-const objdumpPath = "/usr/local/bin/arm-linux-elf-objdump"
-
-func testObjdumpARM(t *testing.T, generate func(func([]byte))) {
-	testObjdumpArch(t, generate, ModeARM)
-}
-
-func testObjdumpArch(t *testing.T, generate func(func([]byte)), arch Mode) {
-	if testing.Short() {
-		t.Skip("skipping objdump test in short mode")
-	}
-
-	if _, err := os.Stat(objdumpPath); err != nil {
-		t.Fatal(err)
-	}
-
-	testExtDis(t, "gnu", arch, objdump, generate, allowedMismatchObjdump)
-}
-
-func objdump(ext *ExtDis) error {
-	// File already written with instructions; add ELF header.
-	if ext.Arch == ModeARM {
-		if err := writeELF32(ext.File, ext.Size); err != nil {
-			return err
-		}
-	} else {
-		panic("unknown arch")
-	}
-
-	b, err := ext.Run(objdumpPath, "-d", "-z", ext.File.Name())
-	if err != nil {
-		return err
-	}
-
-	var (
-		nmatch  int
-		reading bool
-		next    uint32 = start
-		addr    uint32
-		encbuf  [4]byte
-		enc     []byte
-		text    string
-	)
-	flush := func() {
-		if addr == next {
-			if m := pcrel.FindStringSubmatch(text); m != nil {
-				targ, _ := strconv.ParseUint(m[2], 16, 64)
-				text = fmt.Sprintf("%s .%+#x", m[1], int32(uint32(targ)-addr-uint32(len(enc))))
-			}
-			if strings.HasPrefix(text, "stmia") {
-				text = "stm" + text[5:]
-			}
-			if strings.HasPrefix(text, "stmfd") {
-				text = "stmdb" + text[5:]
-			}
-			if strings.HasPrefix(text, "ldmfd") {
-				text = "ldm" + text[5:]
-			}
-			text = strings.Replace(text, "#0.0", "#0", -1)
-			if text == "undefined" && len(enc) == 4 {
-				text = "error: unknown instruction"
-				enc = nil
-			}
-			if len(enc) == 4 {
-				// prints as word but we want to record bytes
-				enc[0], enc[3] = enc[3], enc[0]
-				enc[1], enc[2] = enc[2], enc[1]
-			}
-			ext.Dec <- ExtInst{addr, encbuf, len(enc), text}
-			encbuf = [4]byte{}
-			enc = nil
-			next += 4
-		}
-	}
-	var textangle = []byte("<.text>:")
-	for {
-		line, err := b.ReadSlice('\n')
-		if err != nil {
-			if err == io.EOF {
-				break
-			}
-			return fmt.Errorf("reading objdump output: %v", err)
-		}
-		if bytes.Contains(line, textangle) {
-			reading = true
-			continue
-		}
-		if !reading {
-			continue
-		}
-		if debug {
-			os.Stdout.Write(line)
-		}
-		if enc1 := parseContinuation(line, encbuf[:len(enc)]); enc1 != nil {
-			enc = enc1
-			continue
-		}
-		flush()
-		nmatch++
-		addr, enc, text = parseLine(line, encbuf[:0])
-		if addr > next {
-			return fmt.Errorf("address out of sync expected <= %#x at %q in:\n%s", next, line, line)
-		}
-	}
-	flush()
-	if next != start+uint32(ext.Size) {
-		return fmt.Errorf("not enough results found [%d %d]", next, start+ext.Size)
-	}
-	if err := ext.Wait(); err != nil {
-		return fmt.Errorf("exec: %v", err)
-	}
-
-	return nil
-}
-
-var (
-	undefined      = []byte("<UNDEFINED>")
-	unpredictable  = []byte("<UNPREDICTABLE>")
-	illegalShifter = []byte("<illegal shifter operand>")
-)
-
-func parseLine(line []byte, encstart []byte) (addr uint32, enc []byte, text string) {
-	oline := line
-	i := index(line, ":\t")
-	if i < 0 {
-		log.Fatalf("cannot parse disassembly: %q", oline)
-	}
-	x, err := strconv.ParseUint(string(trimSpace(line[:i])), 16, 32)
-	if err != nil {
-		log.Fatalf("cannot parse disassembly: %q", oline)
-	}
-	addr = uint32(x)
-	line = line[i+2:]
-	i = bytes.IndexByte(line, '\t')
-	if i < 0 {
-		log.Fatalf("cannot parse disassembly: %q", oline)
-	}
-	enc, ok := parseHex(line[:i], encstart)
-	if !ok {
-		log.Fatalf("cannot parse disassembly: %q", oline)
-	}
-	line = trimSpace(line[i:])
-	if bytes.Contains(line, undefined) {
-		text = "undefined"
-		return
-	}
-	if bytes.Contains(line, illegalShifter) {
-		text = "undefined"
-		return
-	}
-	if false && bytes.Contains(line, unpredictable) {
-		text = "unpredictable"
-		return
-	}
-	if i := bytes.IndexByte(line, ';'); i >= 0 {
-		line = trimSpace(line[:i])
-	}
-	text = string(fixSpace(line))
-	return
-}
-
-func parseContinuation(line []byte, enc []byte) []byte {
-	i := index(line, ":\t")
-	if i < 0 {
-		return nil
-	}
-	line = line[i+1:]
-	enc, _ = parseHex(line, enc)
-	return enc
-}
-
-// writeELF32 writes an ELF32 header to the file,
-// describing a text segment that starts at start
-// and extends for size bytes.
-func writeELF32(f *os.File, size int) error {
-	f.Seek(0, 0)
-	var hdr elf.Header32
-	var prog elf.Prog32
-	var sect elf.Section32
-	var buf bytes.Buffer
-	binary.Write(&buf, binary.LittleEndian, &hdr)
-	off1 := buf.Len()
-	binary.Write(&buf, binary.LittleEndian, &prog)
-	off2 := buf.Len()
-	binary.Write(&buf, binary.LittleEndian, &sect)
-	off3 := buf.Len()
-	buf.Reset()
-	data := byte(elf.ELFDATA2LSB)
-	hdr = elf.Header32{
-		Ident:     [16]byte{0x7F, 'E', 'L', 'F', 1, data, 1},
-		Type:      2,
-		Machine:   uint16(elf.EM_ARM),
-		Version:   1,
-		Entry:     start,
-		Phoff:     uint32(off1),
-		Shoff:     uint32(off2),
-		Flags:     0x05000002,
-		Ehsize:    uint16(off1),
-		Phentsize: uint16(off2 - off1),
-		Phnum:     1,
-		Shentsize: uint16(off3 - off2),
-		Shnum:     3,
-		Shstrndx:  2,
-	}
-	binary.Write(&buf, binary.LittleEndian, &hdr)
-	prog = elf.Prog32{
-		Type:   1,
-		Off:    start,
-		Vaddr:  start,
-		Paddr:  start,
-		Filesz: uint32(size),
-		Memsz:  uint32(size),
-		Flags:  5,
-		Align:  start,
-	}
-	binary.Write(&buf, binary.LittleEndian, &prog)
-	binary.Write(&buf, binary.LittleEndian, &sect) // NULL section
-	sect = elf.Section32{
-		Name:      1,
-		Type:      uint32(elf.SHT_PROGBITS),
-		Addr:      start,
-		Off:       start,
-		Size:      uint32(size),
-		Flags:     uint32(elf.SHF_ALLOC | elf.SHF_EXECINSTR),
-		Addralign: 4,
-	}
-	binary.Write(&buf, binary.LittleEndian, &sect) // .text
-	sect = elf.Section32{
-		Name:      uint32(len("\x00.text\x00")),
-		Type:      uint32(elf.SHT_STRTAB),
-		Addr:      0,
-		Off:       uint32(off2 + (off3-off2)*3),
-		Size:      uint32(len("\x00.text\x00.shstrtab\x00")),
-		Addralign: 1,
-	}
-	binary.Write(&buf, binary.LittleEndian, &sect)
-	buf.WriteString("\x00.text\x00.shstrtab\x00")
-	f.Write(buf.Bytes())
-	return nil
-}

src/cmd/internal/rsc.io/arm/armasm/plan9x.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package armasm
-
-import (
-	"bytes"
-	"encoding/binary"
-	"fmt"
-	"io"
-	"strings"
-)
-
-// Plan9Syntax returns the Go assembler syntax for the instruction.
-// The syntax was originally defined by Plan 9.
-// The pc is the program counter of the instruction, used for expanding
-// PC-relative addresses into absolute ones.
-// The symname function queries the symbol table for the program
-// being disassembled. Given a target address it returns the name and base
-// address of the symbol containing the target, if any; otherwise it returns "", 0.
-// The reader r should read from the text segment using text addresses
-// as offsets; it is used to display pc-relative loads as constant loads.
-func Plan9Syntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text io.ReaderAt) string {
-	if symname == nil {
-		symname = func(uint64) (string, uint64) { return "", 0 }
-	}
-
-	var args []string
-	for _, a := range inst.Args {
-		if a == nil {
-			break
-		}
-		args = append(args, plan9Arg(&inst, pc, symname, a))
-	}
-
-	op := inst.Op.String()
-
-	switch inst.Op &^ 15 {
-	case LDR_EQ, LDRB_EQ, LDRH_EQ:
-		// Check for RET
-		reg, _ := inst.Args[0].(Reg)
-		mem, _ := inst.Args[1].(Mem)
-		if inst.Op&^15 == LDR_EQ && reg == R15 && mem.Base == SP && mem.Sign == 0 && mem.Mode == AddrPostIndex {
-			return fmt.Sprintf("RET%s #%d", op[3:], mem.Offset)
-		}
-
-		// Check for PC-relative load.
-		if mem.Base == PC && mem.Sign == 0 && mem.Mode == AddrOffset && text != nil {
-			addr := uint32(pc) + 8 + uint32(mem.Offset)
-			buf := make([]byte, 4)
-			switch inst.Op &^ 15 {
-			case LDRB_EQ:
-				if _, err := text.ReadAt(buf[:1], int64(addr)); err != nil {
-					break
-				}
-				args[1] = fmt.Sprintf("$%#x", buf[0])
-
-			case LDRH_EQ:
-				if _, err := text.ReadAt(buf[:2], int64(addr)); err != nil {
-					break
-				}
-				args[1] = fmt.Sprintf("$%#x", binary.LittleEndian.Uint16(buf))
-
-			case LDR_EQ:
-				if _, err := text.ReadAt(buf, int64(addr)); err != nil {
-					break
-				}
-				x := binary.LittleEndian.Uint32(buf)
-				if s, base := symname(uint64(x)); s != "" && uint64(x) == base {
-					args[1] = fmt.Sprintf("$%s(SB)", s)
-				} else {
-					args[1] = fmt.Sprintf("$%#x", x)
-				}
-			}
-		}
-	}
-
-	// Move addressing mode into opcode suffix.
-	suffix := ""
-	switch inst.Op &^ 15 {
-	case LDR_EQ, LDRB_EQ, LDRH_EQ, STR_EQ, STRB_EQ, STRH_EQ:
-		mem, _ := inst.Args[1].(Mem)
-		switch mem.Mode {
-		case AddrOffset, AddrLDM:
-			// no suffix
-		case AddrPreIndex, AddrLDM_WB:
-			suffix = ".W"
-		case AddrPostIndex:
-			suffix = ".P"
-		}
-		off := ""
-		if mem.Offset != 0 {
-			off = fmt.Sprintf("%#x", mem.Offset)
-		}
-		base := fmt.Sprintf("(R%d)", int(mem.Base))
-		index := ""
-		if mem.Sign != 0 {
-			sign := ""
-			if mem.Sign < 0 {
-				sign = ""
-			}
-			shift := ""
-			if mem.Count != 0 {
-				shift = fmt.Sprintf("%s%d", plan9Shift[mem.Shift], mem.Count)
-			}
-			index = fmt.Sprintf("(%sR%d%s)", sign, int(mem.Index), shift)
-		}
-		args[1] = off + base + index
-	}
-
-	// Reverse args, placing dest last.
-	for i, j := 0, len(args)-1; i < j; i, j = i+1, j-1 {
-		args[i], args[j] = args[j], args[i]
-	}
-
-	switch inst.Op &^ 15 {
-	case MOV_EQ:
-		op = "MOVW" + op[3:]
-
-	case LDR_EQ:
-		op = "MOVW" + op[3:] + suffix
-	case LDRB_EQ:
-		op = "MOVB" + op[4:] + suffix
-	case LDRH_EQ:
-		op = "MOVH" + op[4:] + suffix
-
-	case STR_EQ:
-		op = "MOVW" + op[3:] + suffix
-		args[0], args[1] = args[1], args[0]
-	case STRB_EQ:
-		op = "MOVB" + op[4:] + suffix
-		args[0], args[1] = args[1], args[0]
-	case STRH_EQ:
-		op = "MOVH" + op[4:] + suffix
-		args[0], args[1] = args[1], args[0]
-	}
-
-	if args != nil {
-		op += " " + strings.Join(args, ", ")
-	}
-
-	return op
-}
-
-// assembler syntax for the various shifts.
-// @x> is a lie; the assembler uses @> 0
-// instead of @x> 1, but i wanted to be clear that it
-// was a different operation (rotate right extended, not rotate right).
-var plan9Shift = []string{"<<", ">>", "->", "@>", "@x>"}
-
-func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg Arg) string {
-	switch a := arg.(type) {
-	case Endian:
-
-	case Imm:
-		return fmt.Sprintf("$%d", int(a))
-
-	case Mem:
-
-	case PCRel:
-		addr := uint32(pc) + 8 + uint32(a)
-		if s, base := symname(uint64(addr)); s != "" && uint64(addr) == base {
-			return fmt.Sprintf("%s(SB)", s)
-		}
-		return fmt.Sprintf("%#x", addr)
-
-	case Reg:
-		if a < 16 {
-			return fmt.Sprintf("R%d", int(a))
-		}
-
-	case RegList:
-		var buf bytes.Buffer
-		start := -2
-		end := -2
-		fmt.Fprintf(&buf, "[")
-		flush := func() {
-			if start >= 0 {
-				if buf.Len() > 1 {
-					fmt.Fprintf(&buf, ",")
-				}
-				if start == end {
-					fmt.Fprintf(&buf, "R%d", start)
-				} else {
-					fmt.Fprintf(&buf, "R%d-R%d", start, end)
-				}
-			}
-		}
-		for i := 0; i < 16; i++ {
-			if a&(1<<uint(i)) != 0 {
-				if i == end+1 {
-					end++
-					continue
-				}
-				start = i
-				end = i
-			}
-		}
-		flush()
-		fmt.Fprintf(&buf, "]")
-		return buf.String()
-
-	case RegShift:
-		return fmt.Sprintf("R%d%s$%d", int(a.Reg), plan9Shift[a.Shift], int(a.Count))
-
-	case RegShiftReg:
-		return fmt.Sprintf("R%d%sR%d", int(a.Reg), plan9Shift[a.Shift], int(a.RegCount))
-	}
-	return strings.ToUpper(arg.String())
-}

src/cmd/internal/rsc.io/arm/armasm/testdata/Makefile

-newdecode.txt:
-	cd ..; go test -cover -run 'ObjdumpARMCond' -v -timeout 10h -printtests -long 2>&1 | tee log
-	cd ..; go test -cover -run 'ObjdumpARMUncond' -v -timeout 10h -printtests -long 2>&1 | tee -a log
-	egrep '	(gnu|plan9)	' ../log |sort >newdecode.txt
-

src/cmd/internal/rsc.io/x86/x86asm/Makefile

-tables.go: ../x86map/map.go ../x86.csv 
-	go run ../x86map/map.go -fmt=decoder ../x86.csv >_tables.go && gofmt _tables.go >tables.go && rm _tables.go
-

src/cmd/internal/rsc.io/x86/x86asm/decode_test.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package x86asm
-
-import (
-	"encoding/hex"
-	"io/ioutil"
-	"strconv"
-	"strings"
-	"testing"
-)
-
-func TestDecode(t *testing.T) {
-	data, err := ioutil.ReadFile("testdata/decode.txt")
-	if err != nil {
-		t.Fatal(err)
-	}
-	all := string(data)
-	for strings.Contains(all, "\t\t") {
-		all = strings.Replace(all, "\t\t", "\t", -1)
-	}
-	for _, line := range strings.Split(all, "\n") {
-		line = strings.TrimSpace(line)
-		if line == "" || strings.HasPrefix(line, "#") {
-			continue
-		}
-		f := strings.SplitN(line, "\t", 4)
-		i := strings.Index(f[0], "|")
-		if i < 0 {
-			t.Errorf("parsing %q: missing | separator", f[0])
-			continue
-		}
-		if i%2 != 0 {
-			t.Errorf("parsing %q: misaligned | separator", f[0])
-		}
-		size := i / 2
-		code, err := hex.DecodeString(f[0][:i] + f[0][i+1:])
-		if err != nil {
-			t.Errorf("parsing %q: %v", f[0], err)
-			continue
-		}
-		mode, err := strconv.Atoi(f[1])
-		if err != nil {
-			t.Errorf("invalid mode %q in: %s", f[1], line)
-			continue
-		}
-		syntax, asm := f[2], f[3]
-		inst, err := Decode(code, mode)
-		var out string
-		if err != nil {
-			out = "error: " + err.Error()
-		} else {
-			switch syntax {
-			case "gnu":
-				out = GNUSyntax(inst)
-			case "intel":
-				out = IntelSyntax(inst)
-			case "plan9":
-				out = Plan9Syntax(inst, 0, nil)
-			default:
-				t.Errorf("unknown syntax %q", syntax)
-				continue
-			}
-		}
-		if out != asm || inst.Len != size {
-			t.Errorf("Decode(%s) [%s] = %s, %d, want %s, %d", f[0], syntax, out, inst.Len, asm, size)
-		}
-	}
-}

src/cmd/internal/rsc.io/x86/x86asm/inst_test.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package x86asm
-
-import (
-	"strings"
-	"testing"
-)
-
-func TestRegString(t *testing.T) {
-	for r := Reg(1); r <= regMax; r++ {
-		if regNames[r] == "" {
-			t.Errorf("regNames[%d] is missing", int(r))
-		} else if s := r.String(); strings.Contains(s, "Reg(") {
-			t.Errorf("Reg(%d).String() = %s, want proper name", int(r), s)
-		}
-	}
-}

src/cmd/internal/rsc.io/x86/x86asm/objdump_test.go

-// Copyright 2014 The Go Authors.  All rights reserved.
-// Use of this source code is governed by a BSD-style
-// license that can be found in the LICENSE file.
-
-package x86asm
-
-import (
-	"bytes"
-	"strings"
-	"testing"
-)
-
-func TestObjdump32Manual(t *testing.T)   { testObjdump32(t, hexCases(t, objdumpManualTests)) }
-func TestObjdump32Testdata(t *testing.T) { testObjdump32(t, concat(basicPrefixes, testdataCases(t))) }
-func TestObjdump32ModRM(t *testing.T)    { testObjdump32(t, concat(basicPrefixes, enumModRM)) }
-func TestObjdump32OneByte(t *testing.T)  { testBasic(t, testObjdump32) }
-func TestObjdump320F(t *testing.T)       { testBasic(t, testObjdump32, 0x0F) }
-func TestObjdump320F38(t *testing.T)     { testBasic(t, testObjdump32, 0x0F, 0x38) }
-func TestObjdump320F3A(t *testing.T)     { testBasic(t, testObjdump32, 0x0F, 0x3A) }
-func TestObjdump32Prefix(t *testing.T)   { testPrefix(t, testObjdump32) }
-
-func TestObjdump64Manual(t *testing.T)   { testObjdump64(t, hexCases(t, objdumpManualTests)) }
-func TestObjdump64Testdata(t *testing.T) { testObjdump64(t, concat(basicPrefixes, testdataCases(t))) }
-func TestObjdump64ModRM(t *testing.T)    { testObjdump64(t, concat(basicPrefixes, enumModRM)) }
-func TestObjdump64OneByte(t *testing.T)  { testBasic(t, testObjdump64) }
-func TestObjdump640F(t *testing.T)       { testBasic(t, testObjdump64, 0x0F) }
-func TestObjdump640F38(t *testing.T)     { testBasic(t, testObjdump64, 0x0F, 0x38) }
-func TestObjdump640F3A(t *testing.T)     { testBasic(t, testObjdump64, 0x0F, 0x3A) }
-func TestObjdump64Prefix(t *testing.T)   { testPrefix(t, testObjdump64) }
-
-func TestObjdump64REXTestdata(t *testing.T) {
-	testObjdump64(t, filter(concat3(basicPrefixes, rexPrefixes, testdataCases(t)), isValidREX))
-}
-func TestObjdump64REXModRM(t *testing.T) {
-	testObjdump64(t, concat3(basicPrefixes, rexPrefixes, enumModRM))
-}
-func TestObjdump64REXOneByte(t *testing.T) { testBasicREX(t, testObjdump64) }
-func TestObjdump64REX0F(t *testing.T)      { testBasicREX(t, testObjdump64, 0x0F) }
-func TestObjdump64REX0F38(t *testing.T)    { testBasicREX(t, testObjdump64, 0x0F, 0x38) }
-func TestObjdump64REX0F3A(t *testing.T)    { testBasicREX(t, testObjdump64, 0x0F, 0x3A) }
-func TestObjdump64REXPrefix(t *testing.T)  { testPrefixREX(t, testObjdump64) }
-
-// objdumpManualTests holds test cases that will be run by TestObjdumpManual.
-// If you are debugging a few cases that turned up in a longer run, it can be useful
-// to list them here and then use -run=ObjdumpManual, particularly with tracing enabled.
-var objdumpManualTests = `
-F390
-`
-
-// allowedMismatchObjdump reports whether the mismatch between text and dec
-// should be allowed by the test.
-func allowedMismatchObjdump(text string, size int, inst *Inst, dec ExtInst) bool {
-	if size == 15 && dec.nenc == 15 && contains(text, "truncated") && contains(dec.text, "(bad)") {
-		return true
-	}
-
-	if i := strings.LastIndex(dec.text, " "); isPrefix(dec.text[i+1:]) && size == 1 && isPrefix(text) {
-		return true
-	}
-
-	if size == dec.nenc && contains(dec.text, "movupd") && contains(dec.text, "data32") {
-		s := strings.Replace(dec.text, "data32 ", "", -1)
-		if text == s {
-			return true
-		}
-	}
-
-	// Simplify our invalid instruction text.
-	if text == "error: unrecognized instruction" {
-		text = "BAD"
-	}
-
-	// Invalid instructions for which libopcodes prints %? register.
-	// FF E8 11 22 33 44:
-	// Invalid instructions for which libopcodes prints "internal disassembler error".
-	// Invalid instructions for which libopcodes prints 8087 only (e.g., DB E0)
-	// or prints 287 only (e.g., DB E4).
-	if contains(dec.text, "%?", "<internal disassembler error>", "(8087 only)", "(287 only)") {
-		dec.text = "(bad)"
-	}
-
-	// 0F 19 11, 0F 1C 11, 0F 1D 11, 0F 1E 11, 0F 1F 11: libopcodes says nop,
-	// but the Intel manuals say that the only NOP there is 0F 1F /0.
-	// Perhaps libopcodes is reporting an older encoding.
-	i := bytes.IndexByte(dec.enc[:], 0x0F)
-	if contains(dec.text, "nop") && i >= 0 && i+2 < len(dec.enc) && dec.enc[i+1]&^7 == 0x18 && (dec.enc[i+1] != 0x1F || (dec.enc[i+2]>>3)&7 != 0) {
-		dec.text = "(bad)"
-	}
-
-	// Any invalid instruction.
-	if text == "BAD" && contains(dec.text, "(bad)") {
-		return true
-	}
-
-	// Instructions libopcodes knows but we do not (e.g., 0F 19 11).
-	if (text == "BAD" || size == 1 && isPrefix(text)) && hasPrefix(dec.text, unsupported...) {
-		return true
-	}
-
-	// Instructions we know but libopcodes does not (e.g., 0F D0 11).
-	if (contains(dec.text, "(bad)") || dec.nenc == 1 && isPrefix(dec.text)) && hasPrefix(text, libopcodesUnsupported...) {
-		return true
-	}
-
-	// Libopcodes rejects F2 90 as NOP. Not sure why.
-	if (contains(dec.text, "(bad)") || dec.nenc == 1 && isPrefix(dec.text)) && inst.Opcode>>24 == 0x90 && countPrefix(inst, 0xF2) > 0 {
-		return true
-	}
-
-	// 0F 20 11, 0F 21 11, 0F 22 11, 0F 23 11, 0F 24 11:
-	// Moves into and out of some control registers seem to be unsupported by libopcodes.
-	// TODO(rsc): Are they invalid somehow?
-	if (contains(dec.text, "(bad)") || dec.nenc == 1 && isPrefix(dec.text)) && contains(text, "%cr", "%db", "%tr") {
-		return true
-	}
-
-	if contains(dec.text, "fwait") && dec.nenc == 1 && dec.enc[0] != 0x9B {
-		return true
-	}
-
-	// 9B D9 11: libopcodes reports FSTSW instead of FWAIT + FNSTSW.
-	// This is correct in that FSTSW is a pseudo-op for the pair, but it really
-	// is a pair of instructions: execution can stop between them.
-	// Our decoder chooses to separate them.
-	if (text == "fwait" || strings.HasSuffix(text, " fwait")) && dec.nenc >= len(strings.Fields(text)) && dec.enc[len(strings.Fields(text))-1] == 0x9B {
-		return true
-	}
-
-	// 0F 18 77 11:
-	// Invalid instructions for which libopcodes prints "nop/reserved".
-	// Perhaps libopcodes is reporting an older encoding.
-	if text == "BAD" && contains(dec.text, "nop/reserved") {
-		return true
-	}
-
-	// 0F C7 B0 11 22 33 44: libopcodes says vmptrld 0x44332211(%eax); we say rdrand %eax.
-	// TODO(rsc): Fix, since we are probably wrong, but we don't have vmptrld in the manual.
-	if contains(text, "rdrand") && contains(dec.text, "vmptrld", "vmxon", "vmclear") {
-		return true
-	}
-
-	// DD C8: libopcodes says FNOP but the Intel manual is clear FNOP is only D9 D0.
-	// Perhaps libopcodes is reporting an older encoding.
-	if text == "BAD" && contains(dec.text, "fnop") && (dec.enc[0] != 0xD9 || dec.enc[1] != 0xD0) {
-		return true
-	}
-
-	// 66 90: libopcodes says xchg %ax,%ax; we say 'data16 nop'.
-	// The 16-bit swap will preserve the high bits of the register,
-	// so they are the same.
-	if contains(text, "nop") && contains(dec.text, "xchg %ax,%ax") {
-		return true
-	}
-
-	// If there are multiple prefixes, allow libopcodes to use an alternate name.
-	if size == 1 && dec.nenc == 1 && prefixByte[text] > 0 && prefixByte[text] == prefixByte[dec.text] {
-		return true
-	}
-
-	// 26 9B: libopcodes reports "fwait"/1, ignoring segment prefix.
-	// https://sourceware.org/bugzilla/show_bug.cgi?id=16891
-	// F0 82: Decode="lock"/1 but libopcodes="lock (bad)"/2.
-	if size == 1 && dec.nenc >= 1 && prefixByte[text] == dec.enc[0] && contains(dec.text, "(bad)", "fwait", "fnop") {
-		return true
-	}
-
-	// libopcodes interprets 660f801122 as taking a rel16 but
-	// truncating the address at 16 bits. Not sure what is correct.
-	if contains(text, ".+0x2211", ".+0x11") && contains(dec.text, " .-") {
-		return true
-	}
-
-	// 66 F3 0F D6 C5, 66 F2 0F D6 C0: libopcodes reports use of XMM register instead of MMX register,
-	// but only when the instruction has a 66 prefix. Maybe they know something we don't.
-	if countPrefix(inst, 0x66) > 0 && contains(dec.text, "movdq2q", "movq2dq") && !contains(dec.text, "%mm") {
-		return true
-	}
-
-	// 0F 01 F8, 0F 05, 0F 07: these are 64-bit instructions but libopcodes accepts them.
-	if (text == "BAD" || size == 1 && isPrefix(text)) && contains(dec.text, "swapgs", "syscall", "sysret", "rdfsbase", "rdgsbase", "wrfsbase", "wrgsbase") {
-		return true
-	}
-
-	return false
-}
-
-// Instructions known to libopcodes (or xed) but not to us.
-// Most of these come from supplementary manuals of one form or another.
-var unsupported = strings.Fields(`
-	bndc
-	bndl
-	bndm
-	bnds
-	clac
-	clgi
-	femms
-	fldln
-	fldz
-	getsec
-	invlpga
-	kmov
-	montmul
-	pavg
-	pf2i
-	pfacc
-	pfadd
-	pfcmp
-	pfmax
-	pfmin
-	pfmul
-	pfna
-	pfpnac
-	pfrc
-	pfrs
-	pfsub
-	phadd
-	phsub
-	pi2f
-	pmulhr
-	prefetch
-	pswap
-	ptest
-	rdseed
-	sha1
-	sha256
-	skinit
-	stac
-	stgi
-	vadd
-	vand
-	vcmp
-	vcomis
-	vcvt
-	vcvt
-	vdiv
-	vhadd
-	vhsub
-	vld
-	vmax
-	vmcall
-	vmfunc
-	vmin
-	vmlaunch
-	vmload
-	vmmcall
-	vmov
-	vmov
-	vmov
-	vmptrld
-	vmptrst
-	vmread
-	vmresume
-	vmrun
-	vmsave
-	vmul
-	vmwrite
-	vmxoff
-	vor
-	vpack
-	vpadd
-	vpand
-	vpavg
-	vpcmp
-	vpcmp
-	vpins
-	vpmadd
-	vpmax
-	vpmin
-	vpmul
-	vpmul
-	vpor
-	vpsad
-	vpshuf
-	vpsll
-	vpsra
-	vpsrad
-	vpsrl
-	vpsub
-	vpunp
-	vpxor
-	vrcp
-	vrsqrt
-	vshuf
-	vsqrt
-	vsub
-	vucomis
-	vunp
-	vxor
-	vzero
-	xcrypt
-	xsha1
-	xsha256
-	xstore-rng
-	insertq
-	extrq
-	vmclear
-	invvpid
-	adox
-	vmxon
-	invept
-	adcx
-	vmclear
-	prefetchwt1
-	enclu
-	encls
-	salc
-	fstpnce
-	fdisi8087_nop
-	fsetpm287_nop
-	feni8087_nop
-	syscall
-	sysret
-`)
-
-// Instructions known to us but not to libopcodes (at least in binutils 2.24).
-var libopcodesUnsupported = strings.Fields(`
-	addsubps
-	aes
-	blend
-	cvttpd2dq
-	dpp
-	extract
-	haddps
-	hsubps
-	insert
-	invpcid
-	lddqu
-	movmsk
-	movnt
-	movq2dq
-	mps
-	pack
-	pblend
-	pclmul
-	pcmp
-	pext
-	phmin
-	pins
-	pmax
-	pmin
-	pmov
-	pmovmsk
-	pmul
-	popcnt
-	pslld
-	psllq
-	psllw
-	psrad
-	psraw
-	psrl
-	ptest
-	punpck
-	round
-	xrstor
-	xsavec
-	xsaves
-	comis
-	ucomis
-	movhps
-	movntps
-	rsqrt
-	rcpp
-	puncpck
-	bsf
-	movq2dq
-	cvttpd2dq
-	movq
-	hsubpd
-	movdqa
-	movhpd
-	addsubpd
-	movd
-	haddpd
-	cvtps2dq
-	bsr
-	cvtdq2ps
-	rdrand
-	maskmov
-	movq2dq
-	movlhps
-	movbe
-	movlpd
-`)

src/cmd/internal/rsc.io/x86/x86asm/testdata/Makefile

-libmach8db: libmach8db.c
-	9c libmach8db.c && 9l -o libmach8db libmach8db.o; rm libmach8db.o
-
-newdecode.txt:
-	cd ..; go test -cover -run 'Objdump.*32' -v -timeout 10h -printtests 2>&1 | tee log
-	cd ..; go test -cover -run 'Objdump.*64' -v -timeout 10h -printtests 2>&1 | tee -a log
-	cd ..; go test -cover -run 'Xed.*32' -v -timeout 10h -printtests 2>&1 | tee -a log
-	cd ..; go test -cover -run 'Xed.*64' -v -timeout 10h -printtests 2>&1 | tee -a log
-	cd ..; go test -cover -run 'Plan9.*32' -v -timeout 10h -printtests 2>&1 | tee -a log
-	cd ..; go test -cover -run 'Plan9.*64' -v -timeout 10h -printtests 2>&1 | tee -a log
-	egrep '	(gnu|intel|plan9)	' ../log |sort >newdecode.txt
-