Commit 83e41b3e authored by Alberto Donizetti's avatar Alberto Donizetti

test/codegen: port math/bits.Leadingzero tests to codegen

Change-Id: Ic21d25db5d56ce77516c53082dfbc010e5875b81
Reviewed-on: https://go-review.googlesource.com/98655
Run-TryBot: Alberto Donizetti <alb.donizetti@gmail.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: default avatarKeith Randall <khr@golang.org>
parent 7178267b
...@@ -241,7 +241,7 @@ var allAsmTests = []*asmTests{ ...@@ -241,7 +241,7 @@ var allAsmTests = []*asmTests{
{ {
arch: "arm", arch: "arm",
os: "linux", os: "linux",
imports: []string{"math/bits", "runtime"}, imports: []string{"runtime"},
tests: linuxARMTests, tests: linuxARMTests,
}, },
{ {
...@@ -251,10 +251,9 @@ var allAsmTests = []*asmTests{ ...@@ -251,10 +251,9 @@ var allAsmTests = []*asmTests{
tests: linuxARM64Tests, tests: linuxARM64Tests,
}, },
{ {
arch: "mips", arch: "mips",
os: "linux", os: "linux",
imports: []string{"math/bits"}, tests: linuxMIPSTests,
tests: linuxMIPSTests,
}, },
{ {
arch: "mips64", arch: "mips64",
...@@ -580,48 +579,6 @@ var linuxAMD64Tests = []*asmTest{ ...@@ -580,48 +579,6 @@ var linuxAMD64Tests = []*asmTest{
`, `,
pos: []string{"\tROLW\t\\$8,"}, pos: []string{"\tROLW\t\\$8,"},
}, },
{
fn: `
func f53(a uint64) int {
return bits.LeadingZeros64(a)
}
`,
pos: []string{"\tBSRQ\t"},
},
{
fn: `
func f54(a uint32) int {
return bits.LeadingZeros32(a)
}
`,
pos: []string{"\tBSRQ\t"},
},
{
fn: `
func f55(a uint16) int {
return bits.LeadingZeros16(a)
}
`,
pos: []string{"\tBSRQ\t"},
},
/* see ssa.go
{
fn:`
func f56(a uint8) int {
return bits.LeadingZeros8(a)
}
`,
pos:[]string{"\tBSRQ\t"},
},
*/
{
fn: `
func f57(a uint) int {
return bits.LeadingZeros(a)
}
`,
pos: []string{"\tBSRQ\t"},
},
{ {
fn: ` fn: `
func pop1(x uint64) int { func pop1(x uint64) int {
...@@ -1322,46 +1279,6 @@ var linuxS390XTests = []*asmTest{ ...@@ -1322,46 +1279,6 @@ var linuxS390XTests = []*asmTest{
`, `,
pos: []string{"\tMOVWBR\t"}, pos: []string{"\tMOVWBR\t"},
}, },
{
fn: `
func f29(a uint64) int {
return bits.LeadingZeros64(a)
}
`,
pos: []string{"\tFLOGR\t"},
},
{
fn: `
func f30(a uint32) int {
return bits.LeadingZeros32(a)
}
`,
pos: []string{"\tFLOGR\t"},
},
{
fn: `
func f31(a uint16) int {
return bits.LeadingZeros16(a)
}
`,
pos: []string{"\tFLOGR\t"},
},
{
fn: `
func f32(a uint8) int {
return bits.LeadingZeros8(a)
}
`,
pos: []string{"\tFLOGR\t"},
},
{
fn: `
func f33(a uint) int {
return bits.LeadingZeros(a)
}
`,
pos: []string{"\tFLOGR\t"},
},
{ {
// check that stack store is optimized away // check that stack store is optimized away
fn: ` fn: `
...@@ -1419,46 +1336,6 @@ var linuxARMTests = []*asmTest{ ...@@ -1419,46 +1336,6 @@ var linuxARMTests = []*asmTest{
`, `,
pos: []string{"\tMOVW\tR[0-9]+@>25,"}, pos: []string{"\tMOVW\tR[0-9]+@>25,"},
}, },
{
fn: `
func f8(a uint64) int {
return bits.LeadingZeros64(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f9(a uint32) int {
return bits.LeadingZeros32(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f10(a uint16) int {
return bits.LeadingZeros16(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f11(a uint8) int {
return bits.LeadingZeros8(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f12(a uint) int {
return bits.LeadingZeros(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{ {
// make sure assembly output has matching offset and base register. // make sure assembly output has matching offset and base register.
fn: ` fn: `
...@@ -1593,46 +1470,6 @@ var linuxARM64Tests = []*asmTest{ ...@@ -1593,46 +1470,6 @@ var linuxARM64Tests = []*asmTest{
`, `,
pos: []string{"\tREVW\t"}, pos: []string{"\tREVW\t"},
}, },
{
fn: `
func f29(a uint64) int {
return bits.LeadingZeros64(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f30(a uint32) int {
return bits.LeadingZeros32(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f31(a uint16) int {
return bits.LeadingZeros16(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f32(a uint8) int {
return bits.LeadingZeros8(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f33(a uint) int {
return bits.LeadingZeros(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{ {
fn: ` fn: `
func f34(a uint64) uint64 { func f34(a uint64) uint64 {
...@@ -2014,47 +1851,6 @@ var linuxARM64Tests = []*asmTest{ ...@@ -2014,47 +1851,6 @@ var linuxARM64Tests = []*asmTest{
} }
var linuxMIPSTests = []*asmTest{ var linuxMIPSTests = []*asmTest{
// Intrinsic tests for math/bits
{
fn: `
func f5(a uint64) int {
return bits.LeadingZeros64(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f6(a uint32) int {
return bits.LeadingZeros32(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f7(a uint16) int {
return bits.LeadingZeros16(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f8(a uint8) int {
return bits.LeadingZeros8(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{
fn: `
func f9(a uint) int {
return bits.LeadingZeros(a)
}
`,
pos: []string{"\tCLZ\t"},
},
{ {
// check that stack store is optimized away // check that stack store is optimized away
fn: ` fn: `
......
...@@ -8,6 +8,50 @@ package codegen ...@@ -8,6 +8,50 @@ package codegen
import "math/bits" import "math/bits"
// ----------------------- //
// bits.LeadingZeros //
// ----------------------- //
func LeadingZeros(n uint) int {
//amd64:"BSRQ"
//s390x:"FLOGR"
//arm:"CLZ" arm64:"CLZ"
//mips:"CLZ"
return bits.LeadingZeros(n)
}
func LeadingZeros64(n uint64) int {
//amd64:"BSRQ"
//s390x:"FLOGR"
//arm:"CLZ" arm64:"CLZ"
//mips:"CLZ"
return bits.LeadingZeros64(n)
}
func LeadingZeros32(n uint32) int {
//amd64:"BSRQ"
//s390x:"FLOGR"
//arm:"CLZ" arm64:"CLZ"
//mips:"CLZ"
return bits.LeadingZeros32(n)
}
func LeadingZeros16(n uint16) int {
//amd64:"BSRQ"
//s390x:"FLOGR"
//arm:"CLZ" arm64:"CLZ"
//mips:"CLZ"
return bits.LeadingZeros16(n)
}
func LeadingZeros8(n uint8) int {
//amd64 LeadingZeros8 not intrinsified (see ssa.go)
//s390x:"FLOGR"
//arm:"CLZ" arm64:"CLZ"
//mips:"CLZ"
return bits.LeadingZeros8(n)
}
// --------------- // // --------------- //
// bits.Len* // // bits.Len* //
// --------------- // // --------------- //
...@@ -45,7 +89,7 @@ func Len16(n uint16) int { ...@@ -45,7 +89,7 @@ func Len16(n uint16) int {
} }
func Len8(n uint8) int { func Len8(n uint8) int {
//amd64 Len8 not intrisified //amd64 Len8 not intrisified (see ssa.go)
//s390x:"FLOGR" //s390x:"FLOGR"
//arm:"CLZ" arm64:"CLZ" //arm:"CLZ" arm64:"CLZ"
//mips:"CLZ" //mips:"CLZ"
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment