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Kirill Smelkov
go
Commits
844ec6bb
Commit
844ec6bb
authored
Apr 06, 2014
by
Russ Cox
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cmd/8g: fix liveness for 387 build (including plan9)
TBR=khr CC=golang-codereviews
https://golang.org/cl/84570045
parent
258ee61c
Changes
2
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2 changed files
with
19 additions
and
6 deletions
+19
-6
src/cmd/8g/prog.c
src/cmd/8g/prog.c
+10
-5
src/cmd/gc/plive.c
src/cmd/gc/plive.c
+9
-1
No files found.
src/cmd/8g/prog.c
View file @
844ec6bb
...
@@ -138,11 +138,16 @@ static ProgInfo progtable[ALAST] = {
...
@@ -138,11 +138,16 @@ static ProgInfo progtable[ALAST] = {
[
AFMOVW
]
=
{
SizeW
|
LeftAddr
|
RightWrite
},
[
AFMOVW
]
=
{
SizeW
|
LeftAddr
|
RightWrite
},
[
AFMOVV
]
=
{
SizeQ
|
LeftAddr
|
RightWrite
},
[
AFMOVV
]
=
{
SizeQ
|
LeftAddr
|
RightWrite
},
[
AFMOVDP
]
=
{
SizeD
|
LeftRead
|
RightAddr
},
// These instructions are marked as RightAddr
[
AFMOVFP
]
=
{
SizeF
|
LeftRead
|
RightAddr
},
// so that the register optimizer does not try to replace the
[
AFMOVLP
]
=
{
SizeL
|
LeftRead
|
RightAddr
},
// memory references with integer register references.
[
AFMOVWP
]
=
{
SizeW
|
LeftRead
|
RightAddr
},
// But they do not use the previous value at the address, so
[
AFMOVVP
]
=
{
SizeQ
|
LeftRead
|
RightAddr
},
// we also mark them RightWrite.
[
AFMOVDP
]
=
{
SizeD
|
LeftRead
|
RightWrite
|
RightAddr
},
[
AFMOVFP
]
=
{
SizeF
|
LeftRead
|
RightWrite
|
RightAddr
},
[
AFMOVLP
]
=
{
SizeL
|
LeftRead
|
RightWrite
|
RightAddr
},
[
AFMOVWP
]
=
{
SizeW
|
LeftRead
|
RightWrite
|
RightAddr
},
[
AFMOVVP
]
=
{
SizeQ
|
LeftRead
|
RightWrite
|
RightAddr
},
[
AFMULD
]
=
{
SizeD
|
LeftAddr
|
RightRdwr
},
[
AFMULD
]
=
{
SizeD
|
LeftAddr
|
RightRdwr
},
[
AFMULDP
]
=
{
SizeD
|
LeftAddr
|
RightRdwr
},
[
AFMULDP
]
=
{
SizeD
|
LeftAddr
|
RightRdwr
},
...
...
src/cmd/gc/plive.c
View file @
844ec6bb
...
@@ -755,7 +755,15 @@ Next:
...
@@ -755,7 +755,15 @@ Next:
if
(
prog
->
as
==
AVARDEF
||
prog
->
as
==
AVARKILL
)
if
(
prog
->
as
==
AVARDEF
||
prog
->
as
==
AVARKILL
)
bvset
(
varkill
,
pos
);
bvset
(
varkill
,
pos
);
}
else
{
}
else
{
if
(
info
.
flags
&
(
RightRead
|
RightAddr
))
// RightRead is a read, obviously.
// RightAddr by itself is also implicitly a read.
//
// RightAddr|RightWrite means that the address is being taken
// but only so that the instruction can write to the value.
// It is not a read. It is equivalent to RightWrite except that
// having the RightAddr bit set keeps the registerizer from
// trying to substitute a register for the memory location.
if
((
info
.
flags
&
RightRead
)
||
(
info
.
flags
&
(
RightAddr
|
RightWrite
))
==
RightAddr
)
bvset
(
uevar
,
pos
);
bvset
(
uevar
,
pos
);
if
(
info
.
flags
&
RightWrite
)
if
(
info
.
flags
&
RightWrite
)
if
(
to
->
node
!=
nil
&&
(
!
isfat
(
to
->
node
->
type
)
||
prog
->
as
==
AVARDEF
))
if
(
to
->
node
!=
nil
&&
(
!
isfat
(
to
->
node
->
type
)
||
prog
->
as
==
AVARDEF
))
...
...
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