Commit bc9e1604 authored by Josh Bleecher Snyder's avatar Josh Bleecher Snyder

runtime: prevent pointless jmp in amd64 and 386 memmove

6a and 8a rearrange memmove such that the fallthrough from move_1or2 to move_0 ends up being a JMP to a RET. Insert an explicit RET to prevent such silliness.

Do the same for memclr as prophylaxis.

benchmark                old ns/op     new ns/op     delta
BenchmarkMemmove1        4.59          4.13          -10.02%
BenchmarkMemmove2        4.58          4.13          -9.83%

LGTM=khr
R=golang-codereviews, dvyukov, minux, ruiu, bradfitz, khr
CC=golang-codereviews
https://golang.org/cl/120930043
parent 74b62b48
...@@ -63,6 +63,7 @@ clr_loop: ...@@ -63,6 +63,7 @@ clr_loop:
clr_1or2: clr_1or2:
MOVB AX, (DI) MOVB AX, (DI)
MOVB AX, -1(DI)(BX*1) MOVB AX, -1(DI)(BX*1)
RET
clr_0: clr_0:
RET RET
clr_3or4: clr_3or4:
......
...@@ -62,6 +62,7 @@ clr_loop: ...@@ -62,6 +62,7 @@ clr_loop:
clr_1or2: clr_1or2:
MOVB AX, (DI) MOVB AX, (DI)
MOVB AX, -1(DI)(BX*1) MOVB AX, -1(DI)(BX*1)
RET
clr_0: clr_0:
RET RET
clr_3or4: clr_3or4:
......
...@@ -32,6 +32,7 @@ clr_tail: ...@@ -32,6 +32,7 @@ clr_tail:
clr_1or2: clr_1or2:
MOVB AX, (DI) MOVB AX, (DI)
MOVB AX, -1(DI)(BX*1) MOVB AX, -1(DI)(BX*1)
RET
clr_0: clr_0:
RET RET
clr_3or4: clr_3or4:
......
...@@ -115,6 +115,7 @@ move_1or2: ...@@ -115,6 +115,7 @@ move_1or2:
MOVB -1(SI)(BX*1), CX MOVB -1(SI)(BX*1), CX
MOVB AX, (DI) MOVB AX, (DI)
MOVB CX, -1(DI)(BX*1) MOVB CX, -1(DI)(BX*1)
RET
move_0: move_0:
RET RET
move_3or4: move_3or4:
......
...@@ -122,6 +122,7 @@ move_1or2: ...@@ -122,6 +122,7 @@ move_1or2:
MOVB -1(SI)(BX*1), CX MOVB -1(SI)(BX*1), CX
MOVB AX, (DI) MOVB AX, (DI)
MOVB CX, -1(DI)(BX*1) MOVB CX, -1(DI)(BX*1)
RET
move_0: move_0:
RET RET
move_3or4: move_3or4:
......
...@@ -101,6 +101,7 @@ move_1or2: ...@@ -101,6 +101,7 @@ move_1or2:
MOVB -1(SI)(BX*1), CX MOVB -1(SI)(BX*1), CX
MOVB AX, (DI) MOVB AX, (DI)
MOVB CX, -1(DI)(BX*1) MOVB CX, -1(DI)(BX*1)
RET
move_0: move_0:
RET RET
move_3or4: move_3or4:
......
...@@ -104,6 +104,7 @@ move_1or2: ...@@ -104,6 +104,7 @@ move_1or2:
MOVB -1(SI)(BX*1), CX MOVB -1(SI)(BX*1), CX
MOVB AX, (DI) MOVB AX, (DI)
MOVB CX, -1(DI)(BX*1) MOVB CX, -1(DI)(BX*1)
RET
move_0: move_0:
RET RET
move_3or4: move_3or4:
......
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