am335x-evm.dts 20.9 KB
Newer Older
1 2 3 4 5 6 7 8 9
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

10
#include "am33xx.dtsi"
11
#include <dt-bindings/interrupt-controller/irq.h>
12 13 14 15 16

/ {
	model = "TI AM335x EVM";
	compatible = "ti,am335x-evm", "ti,am33xx";

17 18 19 20 21 22
	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

23
	memory@80000000 {
24 25 26
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};
27

28 29 30 31
	chosen {
		stdout-path = &uart0;
	};

32
	vbat: fixedregulator0 {
33 34 35 36 37 38
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};
39

40
	lis3_reg: fixedregulator1 {
41 42 43 44
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};
45

46
	wlan_en_reg: fixedregulator2 {
47 48 49 50 51 52 53 54 55 56 57 58 59
		compatible = "regulator-fixed";
		regulator-name = "wlan-en-regulator";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;

		/* WLAN_EN GPIO for this board - Bank1, pin16 */
		gpio = <&gpio1 16 0>;

		/* WLAN card specific delay */
		startup-delay-us = <70000>;
		enable-active-high;
	};

60
	matrix_keypad: matrix_keypad0 {
61 62 63 64
		compatible = "gpio-matrix-keypad";
		debounce-delay-ms = <5>;
		col-scan-delay-us = <2>;

65 66 67
		row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH		/* Bank1, pin25 */
			     &gpio1 26 GPIO_ACTIVE_HIGH		/* Bank1, pin26 */
			     &gpio1 27 GPIO_ACTIVE_HIGH>;	/* Bank1, pin27 */
68

69 70
		col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH		/* Bank1, pin21 */
			     &gpio1 22 GPIO_ACTIVE_HIGH>;	/* Bank1, pin22 */
71 72 73 74 75 76 77 78

		linux,keymap = <0x0000008b	/* MENU */
				0x0100009e	/* BACK */
				0x02000069	/* LEFT */
				0x0001006a	/* RIGHT */
				0x0101001c	/* ENTER */
				0x0201006c>;	/* DOWN */
	};
79

80
	gpio_keys: volume_keys0 {
81 82 83 84 85
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		autorepeat;

86
		switch9 {
87 88
			label = "volume-up";
			linux,code = <115>;
89
			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
90
			wakeup-source;
91 92
		};

93
		switch10 {
94 95
			label = "volume-down";
			linux,code = <114>;
96
			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
97
			wakeup-source;
98 99
		};
	};
100 101 102 103 104 105 106

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 0>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};
107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140

	panel {
		compatible = "ti,tilcdc,panel";
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = <&lcd_pins_s0>;
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <32>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};

		display-timings {
			800x480p62 {
				clock-frequency = <30000000>;
				hactive = <800>;
				vactive = <480>;
				hfront-porch = <39>;
				hback-porch = <39>;
				hsync-len = <47>;
				vback-porch = <29>;
				vfront-porch = <13>;
				vsync-len = <2>;
				hsync-active = <1>;
				vsync-active = <1>;
			};
		};
	};
141 142

	sound {
143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165
		compatible = "simple-audio-card";
		simple-audio-card,name = "AM335x-EVM";
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Line", "Line In";
		simple-audio-card,routing =
			"Headphone Jack",	"HPLOUT",
			"Headphone Jack",	"HPROUT",
			"LINE1L",		"Line In",
			"LINE1R",		"Line In";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&sound_master>;
		simple-audio-card,frame-master = <&sound_master>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <&mcasp1>;
		};

		sound_master: simple-audio-card,codec {
			sound-dai = <&tlv320aic3106>;
			system-clock-frequency = <12000000>;
		};
166
	};
167 168
};

169 170 171 172 173 174
&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;

	matrix_keypad_s0: matrix_keypad_s0 {
		pinctrl-single,pins = <
175 176 177 178 179
			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a9.gpio1_25 */
			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a10.gpio1_26 */
			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.gpio1_27 */
180 181 182 183 184
		>;
	};

	volume_keys_s0: volume_keys_s0 {
		pinctrl-single,pins = <
185 186
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_sclk.gpio0_2 */
			AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_d0.gpio0_3 */
187 188 189 190 191
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
192 193
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
194 195 196 197 198
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
199 200
			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d1.i2c1_sda */
			AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_cs0.i2c1_scl */
201 202 203 204 205
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
206 207
			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
208 209 210
		>;
	};

211 212
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
213 214 215 216
			AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)		/* uart1_ctsn.uart1_ctsn */
			AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */
217 218 219
		>;
	};

220 221
	clkout2_pin: pinmux_clkout2_pin {
		pinctrl-single,pins = <
222
			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
223 224 225 226 227
		>;
	};

	nandflash_pins_s0: nandflash_pins_s0 {
		pinctrl-single,pins = <
228 229 230 231 232 233 234 235 236 237 238 239 240 241 242
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
243 244 245 246 247
		>;
	};

	ecap0_pins: backlight_pins {
		pinctrl-single,pins = <
248
			AM33XX_IOPAD(0x964, MUX_MODE0)	/* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
249 250 251 252 253 254
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
255 256 257 258 259 260 261 262 263 264 265 266
			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
267 268 269 270 271 272
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
273 274 275 276 277 278 279 280 281 282 283 284
			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
285 286 287 288 289 290
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
291 292
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
293 294 295 296 297 298
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
299 300
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
301 302
		>;
	};
303

304 305
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
306
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
307 308 309
		>;
	};

310 311
	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
312 313 314 315 316 317
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
318 319 320 321 322
		>;
	};

	wlan_pins: pinmux_wlan_pins {
		pinctrl-single,pins = <
323 324 325
			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a0.gpio1_16 */
			AM33XX_IOPAD(0x99c, PIN_INPUT | MUX_MODE7)		/* mcasp0_ahclkr.gpio3_17 */
			AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* mcasp0_ahclkx.gpio3_21 */
326 327 328
		>;
	};

329 330
	lcd_pins_s0: lcd_pins_s0 {
		pinctrl-single,pins = <
331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358
			AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad8.lcd_data23 */
			AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad9.lcd_data22 */
			AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad10.lcd_data21 */
			AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad11.lcd_data20 */
			AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad12.lcd_data19 */
			AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad13.lcd_data18 */
			AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad14.lcd_data17 */
			AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)		/* gpmc_ad15.lcd_data16 */
			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)		/* lcd_data0.lcd_data0 */
			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)		/* lcd_data1.lcd_data1 */
			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)		/* lcd_data2.lcd_data2 */
			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)		/* lcd_data3.lcd_data3 */
			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)		/* lcd_data4.lcd_data4 */
			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)		/* lcd_data5.lcd_data5 */
			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)		/* lcd_data6.lcd_data6 */
			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)		/* lcd_data7.lcd_data7 */
			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)		/* lcd_data8.lcd_data8 */
			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)		/* lcd_data9.lcd_data9 */
			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)		/* lcd_data10.lcd_data10 */
			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)		/* lcd_data11.lcd_data11 */
			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)		/* lcd_data12.lcd_data12 */
			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)		/* lcd_data13.lcd_data13 */
			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)		/* lcd_data14.lcd_data14 */
			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)		/* lcd_data15.lcd_data15 */
			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)		/* lcd_vsync.lcd_vsync */
			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)		/* lcd_hsync.lcd_hsync */
			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)		/* lcd_pclk.lcd_pclk */
			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)		/* lcd_ac_bias_en.lcd_ac_bias_en */
359 360
		>;
	};
361

362
	mcasp1_pins: mcasp1_pins {
363
		pinctrl-single,pins = <
364 365 366 367
			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
			AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
368 369
		>;
	};
370

371 372
	mcasp1_pins_sleep: mcasp1_pins_sleep {
		pinctrl-single,pins = <
373 374 375 376
			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
377 378 379
		>;
	};

380 381
	dcan1_pins_default: dcan1_pins_default {
		pinctrl-single,pins = <
382 383
			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
			AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
384 385
		>;
	};
386 387
};

388 389 390 391 392 393 394
&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;

	status = "okay";
};

395 396 397 398 399 400 401
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;

	status = "okay";
};

402 403 404 405 406 407 408 409 410 411 412 413 414 415
&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		reg = <0x2d>;
	};
};

&usb {
	status = "okay";
416
};
417

418 419 420
&usb_ctrl_mod {
	status = "okay";
};
421

422 423 424
&usb0_phy {
	status = "okay";
};
425

426 427 428
&usb1_phy {
	status = "okay";
};
429

430 431 432
&usb0 {
	status = "okay";
};
433

434 435 436 437
&usb1 {
	status = "okay";
	dr_mode = "host";
};
438

439 440
&cppi41dma  {
	status = "okay";
441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <100000>;

	lis331dlh: lis331dlh@18 {
		compatible = "st,lis331dlh", "st,lis3lv02d";
		reg = <0x18>;
		Vdd-supply = <&lis3_reg>;
		Vdd_IO-supply = <&lis3_reg>;

		st,click-single-x;
		st,click-single-y;
		st,click-single-z;
		st,click-thresh-x = <10>;
		st,click-thresh-y = <10>;
		st,click-thresh-z = <10>;
		st,irq1-click;
		st,irq2-click;
		st,wakeup-x-lo;
		st,wakeup-x-hi;
		st,wakeup-y-lo;
		st,wakeup-y-hi;
		st,wakeup-z-lo;
		st,wakeup-z-hi;
		st,min-limit-x = <120>;
		st,min-limit-y = <120>;
		st,min-limit-z = <140>;
		st,max-limit-x = <550>;
		st,max-limit-y = <550>;
		st,max-limit-z = <750>;
	};

	tsl2550: tsl2550@39 {
		compatible = "taos,tsl2550";
		reg = <0x39>;
	};

	tmp275: tmp275@48 {
		compatible = "ti,tmp275";
		reg = <0x48>;
	};
487 488

	tlv320aic3106: tlv320aic3106@1b {
489
		#sound-dai-cells = <0>;
490 491 492 493 494 495 496 497 498 499
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		status = "okay";

		/* Regulators */
		AVDD-supply = <&vaux2_reg>;
		IOVDD-supply = <&vaux2_reg>;
		DRVDD-supply = <&vaux2_reg>;
		DVDD-supply = <&vbat>;
	};
500 501
};

502 503
&lcdc {
	status = "okay";
504 505

	blue-and-red-wiring = "crossed";
506 507
};

508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525
&elm {
	status = "okay";
};

&epwmss0 {
	status = "okay";

	ecap0: ecap@48300100 {
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = <&ecap0_pins>;
	};
};

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins_s0>;
526
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
527
	nand@0,0 {
528
		compatible = "ti,omap2-nand";
529
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
530 531 532
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
533
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
534
		ti,nand-xfer-type = "prefetch-dma";
535
		ti,nand-ecc-opt = "bch8";
536 537
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
559 560 561 562 563
		/* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
564
		partition@0 {
565
			label = "NAND.SPL";
566 567 568
			reg = <0x00000000 0x000020000>;
		};
		partition@1 {
569
			label = "NAND.SPL.backup1";
570 571 572
			reg = <0x00020000 0x00020000>;
		};
		partition@2 {
573
			label = "NAND.SPL.backup2";
574 575 576
			reg = <0x00040000 0x00020000>;
		};
		partition@3 {
577
			label = "NAND.SPL.backup3";
578 579 580
			reg = <0x00060000 0x00020000>;
		};
		partition@4 {
581
			label = "NAND.u-boot-spl-os";
582
			reg = <0x00080000 0x00040000>;
583 584
		};
		partition@5 {
585 586
			label = "NAND.u-boot";
			reg = <0x000C0000 0x00100000>;
587 588
		};
		partition@6 {
589 590
			label = "NAND.u-boot-env";
			reg = <0x001C0000 0x00020000>;
591 592
		};
		partition@7 {
593 594 595 596 597 598 599 600 601 602
			label = "NAND.u-boot-env.backup1";
			reg = <0x001E0000 0x00020000>;
		};
		partition@8 {
			label = "NAND.kernel";
			reg = <0x00200000 0x00800000>;
		};
		partition@9 {
			label = "NAND.file-system";
			reg = <0x00A00000 0x0F600000>;
603 604 605 606
		};
	};
};

607
#include "tps65910.dtsi"
608

609
&mcasp1 {
610
	#sound-dai-cells = <0>;
611
	pinctrl-names = "default", "sleep";
612
	pinctrl-0 = <&mcasp1_pins>;
613
	pinctrl-1 = <&mcasp1_pins_sleep>;
614

615
	status = "okay";
616

617 618 619 620 621 622 623 624
	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	/* 4 serializers */
	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
		0 0 1 2
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
625 626
};

627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649
&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
650
			regulator-max-microvolt = <1351500>;
651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
697 698
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
699 700
			regulator-always-on;
		};
701
	};
702
};
703

704 705 706 707
&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
708
	status = "okay";
709 710 711 712 713 714
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
715
	status = "okay";
716 717
};

718 719
&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
720
	phy-mode = "rgmii-txid";
721 722 723 724
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
725
	phy-mode = "rgmii-txid";
726
};
727 728 729 730 731 732

&tscadc {
	status = "okay";
	tsc {
		ti,wires = <4>;
		ti,x-plate-resistance = <200>;
733
		ti,coordinate-readouts = <5>;
734
		ti,wire-config = <0x00 0x11 0x22 0x33>;
735
		ti,charge-delay = <0x400>;
736 737 738
	};

	adc {
739
		ti,adc-channels = <4 5 6 7>;
740 741
	};
};
742 743 744 745

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
746
	bus-width = <4>;
747 748
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
749
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
750
};
751

752 753 754
&mmc3 {
	/* these are on the crossbar and are outlined in the
	   xbar-event-map element */
755 756
	dmas = <&edma_xbar 12 0 1
		&edma_xbar 13 0 2>;
757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777
	dma-names = "tx", "rx";
	status = "okay";
	vmmc-supply = <&wlan_en_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc3_pins &wlan_pins>;
	ti,non-removable;
	ti,needs-special-hs-handling;
	cap-power-off-card;
	keep-power-in-suspend;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@0 {
		compatible = "ti,wl1835";
		reg = <2>;
		interrupt-parent = <&gpio3>;
		interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
	};
};

778 779 780
&sham {
	status = "okay";
};
781 782 783 784

&aes {
	status = "okay";
};
785 786 787 788 789 790

&dcan1 {
	status = "disabled";	/* Enable only if Profile 1 is selected */
	pinctrl-names = "default";
	pinctrl-0 = <&dcan1_pins_default>;
};
791 792 793 794 795

&rtc {
	clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
	clock-names = "ext-clk", "int-clk";
};