• James Hogan's avatar
    KVM: MIPS/T&E: Expose CP0_EntryLo0/1 registers · 013044cc
    James Hogan authored
    Expose the CP0_EntryLo0 and CP0_EntryLo1 registers through the KVM
    register access API. This is fairly straightforward for trap & emulate
    since we don't support the RI and XI bits. For the sake of future
    proofing (particularly for VZ) it is explicitly specified that the API
    always exposes the 64-bit version of these registers (i.e. with the RI
    and XI bits in bit positions 63 and 62 respectively), and they are
    implemented in trap_emul.c rather than mips.c to allow them to be
    implemented differently for VZ.
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: "Radim Krčmář" <rkrcmar@redhat.com>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: linux-mips@linux-mips.org
    Cc: kvm@vger.kernel.org
    013044cc
kvm_host.h 30.1 KB