• David Zheng's avatar
    i2c: designware: fix idx_write_cnt in read loop · 1acfc6e7
    David Zheng authored
    With IC_INTR_RX_FULL slave interrupt handler reads data in a loop until
    RX FIFO is empty. When testing with the slave-eeprom, each transaction
    has 2 bytes for address/index and 1 byte for value, the address byte
    can be written as data byte due to dropping STOP condition.
    
    In the test below, the master continuously writes to the slave, first 2
    bytes are index, 3rd byte is value and follow by a STOP condition.
    
     i2c_write: i2c-3 #0 a=04b f=0000 l=3 [00-D1-D1]
     i2c_write: i2c-3 #0 a=04b f=0000 l=3 [00-D2-D2]
     i2c_write: i2c-3 #0 a=04b f=0000 l=3 [00-D3-D3]
    
    Upon receiving STOP condition slave eeprom would reset `idx_write_cnt` so
    next 2 bytes can be treated as buffer index for upcoming transaction.
    Supposedly the slave eeprom buffer would be written as
    
     EEPROM[0x00D1] = 0xD1
     EEPROM[0x00D2] = 0xD2
     EEPROM[0x00D3] = 0xD3
    
    When CPU load is high the slave irq handler may not read fast enough,
    the interrupt status can be seen as 0x204 with both DW_IC_INTR_STOP_DET
    (0x200) and DW_IC_INTR_RX_FULL (0x4) bits. The slave device may see
    the transactions below.
    
     0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
     0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
     0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
     0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1794 : INTR_STAT=0x204
     0x1 STATUS SLAVE_ACTIVITY=0x0 : RAW_INTR_STAT=0x1790 : INTR_STAT=0x200
     0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
     0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
     0x1 STATUS SLAVE_ACTIVITY=0x1 : RAW_INTR_STAT=0x1594 : INTR_STAT=0x4
    
    After `D1` is received, read loop continues to read `00` which is the
    first bype of next index. Since STOP condition is ignored by the loop,
    eeprom buffer index increased to `D2` and `00` is written as value.
    
    So the slave eeprom buffer becomes
    
     EEPROM[0x00D1] = 0xD1
     EEPROM[0x00D2] = 0x00
     EEPROM[0x00D3] = 0xD3
    
    The fix is to use `FIRST_DATA_BYTE` (bit 11) in `IC_DATA_CMD` to split
    the transactions. The first index byte in this case would have bit 11
    set. Check this indication to inject I2C_SLAVE_WRITE_REQUESTED event
    which will reset `idx_write_cnt` in slave eeprom.
    Signed-off-by: default avatarDavid Zheng <david.zheng@intel.com>
    Acked-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
    Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
    1acfc6e7
i2c-designware-core.h 12.6 KB