• Vineet Gupta's avatar
    ARCv2: PAE40: set MSB even if !CONFIG_ARC_HAS_PAE40 but PAE exists in SoC · b5ddb6d5
    Vineet Gupta authored
    PAE40 confiuration in hardware extends some of the address registers
    for TLB/cache ops to 2 words.
    
    So far kernel was NOT setting the higher word if feature was not enabled
    in software which is wrong. Those need to be set to 0 in such case.
    
    Normally this would be done in the cache flush / tlb ops, however since
    these registers only exist conditionally, this would have to be
    conditional to a flag being set on boot which is expensive/ugly -
    specially for the more common case of PAE exists but not in use.
    Optimize that by zero'ing them once at boot - nobody will write to
    them afterwards
    
    Cc: stable@vger.kernel.org   #4.4+
    Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
    b5ddb6d5
cache.c 33.6 KB