• Thomas Daniel's avatar
    drm/i915/icl: Enhanced execution list support · 05f0addd
    Thomas Daniel authored
    Enhanced Execlists is an upgraded version of execlists which supports
    up to 8 ports. The lrcs to be submitted are written to a submit queue
    (the ExecLists Submission Queue - ELSQ), which is then loaded on the
    HW. When writing to the ELSP register, the lrcs are written cyclically
    in the queue from position 0 to position 7. Alternatively, it is
    possible to write directly in the individual positions of the queue
    using the ELSQC registers. To be able to re-use all the existing code
    we're using the latter method and we're currently limiting ourself to
    only using 2 elements.
    
    v2: Rebase.
    v3: Switch from !IS_GEN11 to GEN < 11 (Daniele Ceraolo Spurio).
    v4: Use the elsq registers instead of elsp. (Daniele Ceraolo Spurio)
    v5: Reword commit, rename regs to be closer to specs, turn off
        preemption (Daniele), reuse engine->execlists.elsp (Chris)
    v6: use has_logical_ring_elsq to differentiate the new paths
    v7: add preemption support, rename els to submit_reg (Chris)
    v8: save the ctrl register inside the execlists struct, drop CSB
        handling updates (superseded by preempt_complete_status) (Chris)
    v9: s/drm_i915_gem_request/i915_request (Mika)
    v10: resolved conflict in inject_preempt_context (Mika)
    
    Cc: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Signed-off-by: default avatarThomas Daniel <thomas.daniel@intel.com>
    Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
    Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
    Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-4-mika.kuoppala@linux.intel.com
    05f0addd
intel_lrc.c 77.2 KB