This moves us towards being able to remove the duplicated register I/O
code in ASoC.

The datasheet and the driver document the device as having a register map
divided into pages but since the paging is actually done by sending the
page address and the register address with each transaction this is no
different to having a simple register address. The datasheet does also
document the low five bits of the 16 bit "command" as unused which we could
represent as padding but it seems simpler and less confusing to things
that use block transfers or autoincrement to represent these as part of
the register address.
Signed-off-by: Mark Brown <broonie@linaro.org>