• Brian Norris's avatar
    soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM) · 0b741b82
    Brian Norris authored
    This commit adds support for the Broadcom STB S2/S3/S5 suspend states on
    ARM based SoCs.
    
    This requires quite a lot of code in order to deal with the different HW
    blocks that need to be quiesced during suspend:
    
    - DDR PHY SHIM
    - DDR memory controller and sequencer
    - control processor
    
    The final steps of the suspend execute in an on-chip SRAM and there is a
    little bit of assembly code in order to shut down the DDR PHY PLL and
    then go into a wfi loop until a wake-up even occurs. Conversely the
    resume part involves waiting for the DDR PHY PLL to come back up and
    resume executions where we left.
    
    For S3, because of our memory hashing (actual hashing code not included
    for simplicity, and is bypassed) we need to relocate the writable
    variables (stack) into SRAM shortly before suspending in order to leave
    the DRAM untouched and create a reliable hash of its contents.
    
    This code has been contributed by Brian Norris initially and has been
    incrementally fixed and updated to support new chips by a lot of people.
    Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
    Signed-off-by: default avatarMarkus Mayer <mmayer@broadcom.com>
    Signed-off-by: default avatarJustin Chen <justinpopo6@gmail.com>
    Signed-off-by: default avatarGareth Powell <gpowell@broadcom.com>
    Signed-off-by: default avatarDoug Berger <opendmb@gmail.com>
    Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
    0b741b82
s2-arm.S 1.66 KB