• Gautham R. Shenoy's avatar
    powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache · 0be47634
    Gautham R. Shenoy authored
    On POWER platforms where only some groups of threads within a core
    share the L2-cache (indicated by the ibm,thread-groups device-tree
    property), we currently print the incorrect shared_cpu_map/list for
    L2-cache in the sysfs.
    
    This patch reports the correct shared_cpu_map/list on such platforms.
    
    Example:
    On a platform with "ibm,thread-groups" set to
                     00000001 00000002 00000004 00000000
                     00000002 00000004 00000006 00000001
                     00000003 00000005 00000007 00000002
                     00000002 00000004 00000000 00000002
                     00000004 00000006 00000001 00000003
                     00000005 00000007
    
    This indicates that threads {0,2,4,6} in the core share the L2-cache
    and threads {1,3,5,7} in the core share the L2 cache.
    
    However, without the patch, the shared_cpu_map/list for L2 for CPUs 0,
    1 is reported in the sysfs as follows:
    
    /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_list:0-7
    /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:000000,000000ff
    
    /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_list:0-7
    /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:000000,000000ff
    
    With the patch, the shared_cpu_map/list for L2 cache for CPUs 0, 1 is
    correctly reported as follows:
    
    /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_list:0,2,4,6
    /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:000000,00000055
    
    /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_list:1,3,5,7
    /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:000000,000000aa
    
    This patch also defines cpu_l2_cache_mask() for !CONFIG_SMP case.
    Signed-off-by: default avatarGautham R. Shenoy <ego@linux.vnet.ibm.com>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    Link: https://lore.kernel.org/r/1607596739-32439-6-git-send-email-ego@linux.vnet.ibm.com
    0be47634
cacheinfo.c 23.5 KB