• Dmitry Osipenko's avatar
    drm/tegra: dc: rgb: Allow changing PLLD rate on Tegra30+ · 0c921b6d
    Dmitry Osipenko authored
    Asus Transformer TF700T is a Tegra30 tablet device which uses RGB->DSI
    bridge that requires a precise clock rate in order to operate properly.
    Tegra30 has a dedicated PLL for each display controller, hence the PLL
    rate can be changed freely. Allow PLL rate changes on Tegra30+ for RGB
    output. Configure the clock rate before display controller is enabled
    since DC itself may be running off this PLL and it's not okay to change
    the rate of the active PLL that doesn't support dynamic frequency
    switching since hardware will hang.
    
    Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
    Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    0c921b6d
dc.h 26.7 KB