Lower modes on ADV7533 require lower number of DSI lanes for correct
operation. If ADV7533 is being used with 4 DSI lanes, then switch the
lanes to 3 when the target mode's pixel clock is less than 80 Mhz.

Based on patch by Andy Green <andy.green@linaro.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>