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Thomas Abraham authored
The clk_h166 clock, which is the HCLK clock for DSYS domain, is of type 'struct clk' whereas on S5PV210, this clock is suitable to be of type clksrc_clk clock (since it has a choice of clock source and a pre-divider). So this patch replaces the 'struct clk' type clock to 'struct clksrc_clk' type clock for the HCLK DSYS clock. This patch modifies the following. 1. Remove definitions and usage of 'clk_h166' clock. 2. Adds 'clk_sclk_a2m' clock which is one of possible parent clock sources for the DSYS HCLK clock. 3. Adds 'clk_hclk_dsys' clock which is of type 'struct clksrc_clk'. 4. Replace all usage of clk_h166 with clk_hclk_dsys clock. 5. Adds clk_sclk_a2m and clk_hclk_dsys into list of clocks to be registered. 6. Removes the clock rate calculation of hclk166 and replaces it with code that derives the HCLK DSYS clock rate from the clk_hclk_dsys clock. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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