• Jon Hunter's avatar
    ARM: OMAP4: Enhance support for DPLLs with 4X multiplier · 3ff51ed8
    Jon Hunter authored
    On OMAP4 devices, the ABE DPLL has an internal 4X multiplier that can
    be enabled or disabled in addition to the standard configurable
    multiplier (M) for OMAP DPLLs. When configuring the ABE DPLL the 4X
    multiplier is accounted for by checking to see whether it is enabled or
    not. However, when calculating a new rate we only check to see if the
    rate can be achieved with the current setting for the 4X multiplier.
    Enhance the round_rate() function for such DPLLs to see if the rate
    can be achieved with the 4X multiplier if it cannot be achieved without
    the 4X multiplier.
    
    This change is necessary, because when using the 32kHz clock as the
    source clock for the ABE DPLL, the default DPLL frequency for the ABE
    DPLL cannot be achieved without enabling the 4X multiplier.
    
    When using the 32kHz clock as the source clock for the ABE DPLL and
    attempting to lock the DPLL to 98.304MHz (default frequency), it was
    found that the DPLL would fail to lock if the low-power mode for the DPLL
    was not enabled. From reviewing boot-loader settings that configure the
    ABE DPLL it was found that the low-power mode is enabled when using the
    32kHz clock source, however, the documentation for OMAP does not state
    that this is a requirement. Therefore, introduce a new function for
    OMAP4 devices to see if low-power mode can be enabled when calculating a
    new rate to ensure the DPLL will lock.
    
    New variables for the last calculated 4X multiplier and low-power
    setting have been added to the dpll data structure as well as variables
    defining the bit mask for enabling these features via the DPLL's
    control_reg. It is possible that we could eliminate these bit masks from
    the dpll data structure as these bit masks are not unique to OMAP4, if
    it is preferred.
    
    The function omap3_noncore_program_dpll() has been updated to avoid
    passing the calculated values for the multiplier (M) and divider (N) as
    these are stored in the clk structure.
    Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
    Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
    3ff51ed8
dpll44xx.c 5.33 KB