• Gwan-gyeong Mun's avatar
    drm/i915/dp: Change a link bandwidth computation for DP · 16668f48
    Gwan-gyeong Mun authored
    Data M/N calculations were assumed a bpp as RGB format. But when we are
    using YCbCr 4:2:0 output format on DP, we should change bpp calculations
    as YCbCr 4:2:0 format. The pipe_bpp value was assumed RGB format,
    therefore, it was multiplied with 3. But YCbCr 4:2:0 requires a multiplier
    value to 1.5.
    Therefore we need to divide pipe_bpp to 2 while DP output uses YCbCr4:2:0
    format.
     - RGB format bpp = bpc x 3
     - YCbCr 4:2:0 format bpp = bpc x 1.5
    
    But Link M/N values are calculated and applied based on the Full Clock for
    YCbCr 4:2:0. And DP YCbCr 4:2:0 does not need to pixel clock double for
    a dotclock caluation. Only for HDMI YCbCr 4:2:0 needs to pixel clock double
    for a dot clock calculation.
    
    It only affects dp and edp port which use YCbCr 4:2:0 output format.
    And for now, it does not consider a use case of DSC + YCbCr 4:2:0.
    
    v2:
      Addressed review comments from Ville.
      Remove a changing of pipe_bpp on intel_ddi_set_pipe_settings().
      Because the pipe is running at the full bpp, keep pipe_bpp as RGB
      even though YCbCr 4:2:0 output format is used.
      Add a link bandwidth computation for YCbCr4:2:0 output format.
    
    v3:
      Addressed reivew comments from Ville.
      In order to make codes simple, it adds and uses intel_dp_output_bpp()
      function.
    
    v6:
      Link M/N values are calculated and applied based on the Full Clock for
      YCbCr420. The Bit per Pixel needs to be adjusted for YUV420 mode as it
      requires only half of the RGB case.
        - Link M/N values are calculated and applied based on the Full Clock
        - Data M/N values needs to be calculated considering the data is half
          due to subsampling
      Remove a doubling of pixel clock on a dot clock calculator for
      DP YCbCr 4:2:0.
      Rebase and remove a duplicate setting of vsc_sdp.DB17.
      Add a setting of dynamic range bit to  vsc_sdp.DB17.
      Change Content Type bit to "Graphics" from "Not defined".
      Change a dividing of pipe_bpp to muliplying to constant values on a
      switch-case statement.
    
    v7:
      Addressed review comments from Ville.
      Move a setting of dynamic range bit and a setting of bpc which is based
      on pipe_bpp to a "drm/i915/dp: Program VSC Header and DB for Pixel
      Encoding/Colorimetry Format" commit.
      Change Content Type bit to "Not defined" from "Graphics".
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
    Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
    Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190521121721.32010-6-gwan-gyeong.mun@intel.com
    16668f48
intel_ddi.c 129 KB