• Dillon Varone's avatar
    drm/amd/display: Fix various dynamic ODM transitions on DCN32 · 1e939ea1
    Dillon Varone authored
    [Why&How]
    
    Several transitions were fixed that will allow Dynamic ODM and MPO
    transitions to be supported on DCN32.
    
    1) Due to resource limitations, in certain scenarios that require an MPO
    plane to be split, the features cannot be combined with the current
    policy. This is due to unsafe transitions being required (OPP instance
    per MPCC being switched on active pipe is not supported by DCN), to
    support the split plane with ODM active as it moves across the viewport.
    Dynamic ODM will now be disabled when MPO is required.
    
    2) When exiting MPO and re-entering ODM, DC assigns an inactive pipe for
    the next ODM pipe, which under previous power gating policy would result
    in programming a gated DSC HW block. New policy dynamically
    gates/un-gates DSC blocks when Dynamic ODM is active to support
    
    transitions on DCN32 only.
    
    3) Entry and exit from 3 plane MPO and Dynamic ODM requires a minimal
    transition so that all pipes which require their MPCC OPP instance to
    be changed have a full frame to be disabled before reprogramming. To
    solve this, the Dynamic ODM policy now utilizes minimal state
    transitions when entering or exiting 3 plane scenarios.
    
    4) Various fixes to DCN32 pipe merge/split algorithm to support Dynamic
    ODM and MPO transitions.
    
    In summary, this commit fixes various transitions to support ODM->MPO
    and MPO->ODM.
    Reviewed-by: default avatarMartin Leung <Martin.Leung@amd.com>
    Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
    Acked-by: default avatarJasdeep Dhillon <jdhillon@amd.com>
    Signed-off-by: default avatarDillon Varone <Dillon.Varone@amd.com>
    Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    1e939ea1
hw_sequencer.h 10.6 KB