Add clock controller nodes, include 40M clock source, topckgen,
infracfg, apmixedsys and ethernet subsystem.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Link: https://lore.kernel.org/r/20220119123624.10043-2-sam.shih@mediatek.comSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>