• Kumar Gala's avatar
    [POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boards · b66510cb
    Kumar Gala authored
    The interrupt routing in the device trees for the ULI M1575 was
    inproperly using the interrupt line field as pci function.  Fixed
    up the device tree's to actual conform for to specification and
    changed the interrupt mapping code so it just uses a static mapping
    setup as follows:
    
    PIRQA - IRQ9
    PIRQB - IRQ10
    PIRQC - IRQ11
    PIRQD - IRQ12
    USB 1.1 OCHI (1c.0) - IRQ12
    USB 1.1 OCHI (1c.1) - IRQ9
    USB 1.1 OCHI (1c.2) - IRQ10
    USB 1.1 ECHI (1c.3) - IRQ11
    LAN (1b.0) - IRQ6
    AC97 (1d.0) - IRQ6
    Modem (1d.1) - IRQ6
    HD Audio (1d.2) - IRQ6
    SATA (1f.1) - IRQ5
    SMB (1e.1) - IRQ7
    PMU (1e.2) - IRQ7
    PATA (1f.0) - IRQ14/15
    
    Took the oppurtunity to refactor the code into a single file so we
    don't have to duplicate these fixes on the two current boards in the
    tree and several forth coming boards that will also need the code.
    
    Fixed RTC support that requires a dummy memory read on the P2P bridge
    to unlock the RTC and setup the default of the RTC alarm registers to
    match with a basic x86 style CMOS RTC.
    
    Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure
    the PCI IO space has been setup properly before we start poking ISA
    registers at random locations.
    Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
    b66510cb
mpc8544_ds.c 4.24 KB