• Hugo Villeneuve's avatar
    arm64: dts: imx8mn-var-som: add 20ms delay to ethernet regulator enable · 26ca44bd
    Hugo Villeneuve authored
    This commit is taken from Variscite linux kernel public git repository.
    Original patch author: Nate Drude <nate.d@variscite.com>
    See: https://github.com/varigit/linux-imx/blob/5.15-2.0.x-imx_var01/drivers/net/ethernet/freescale/fec_main.c#L3993-L4050
    
    The ethernet phy reset was moved from the fec controller to the
    mdio bus, see for example: 0e825b32
    
    When the fec driver managed the reset, the regulator had time to
    settle during the fec phy reset before calling of_mdiobus_register,
    which probes the mii bus for the phy id to match the correct driver.
    
    Now that the mdio bus controls the reset, the fec driver no longer has
    any delay between enabling the regulator and calling of_mdiobus_register.
    If the regulator voltage has not settled, the phy id will not be read
    correctly and the generic phy driver will be used.
    
    The following call tree explains in more detail:
    
    fec_probe
      fec_reset_phy                               <- no longer introduces delay after migration to mdio reset
      fec_enet_mii_init
        of_mdiobus_register
          of_mdiobus_register_phy
            fwnode_mdiobus_register_phy
              get_phy_device                      <- mii probe for phy id to match driver happens here
              ...
              fwnode_mdiobus_phy_device_register
                phy_device_register
                  mdiobus_register_device
                    mdio_device_reset             <- mdio reset assert / deassert delay happens here
    
    Add a 20ms enable delay to the regulator to fix the issue.
    Signed-off-by: default avatarHugo Villeneuve <hvilleneuve@dimonoff.com>
    Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
    26ca44bd
imx8mn-var-som.dtsi 13.5 KB