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  • Kirill Smelkov
  • linux
  • Repository
  • linux
  • arch
  • nds32
  • include
  • asm
  • cacheflush.h
Find file BlameHistoryPermalink
  • Greentime Hu's avatar
    nds32: To implement these icache invalidation APIs since nds32 cores don't snoop · f706abf1
    Greentime Hu authored Jun 28, 2018
    
    data cache.
    This issue is found by Guo Ren. Based on the Documentation/core-api/cachetlb.rst
    and it says:
    
    "Any necessary cache flushing or other coherency operations
    that need to occur should happen here.  If the processor's
    instruction cache does not snoop cpu stores, it is very
    likely that you will need to flush the instruction cache
    for copy_to_user_page()."
    
    "If the icache does not snoop stores then this
    routine(flush_icache_range) will need to flush it."
    
    Signed-off-by: default avatarGuo Ren <ren_guo@c-sky.com>
    Signed-off-by: default avatarGreentime Hu <greentime@andestech.com>
    f706abf1
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