• Dan Williams's avatar
    cxl/port: Fix cxl_test register enumeration regression · a76b6251
    Dan Williams authored
    The cxl_test unit test environment models a CXL topology for
    sysfs/user-ABI regression testing. It uses interface mocking via the
    "--wrap=" linker option to redirect cxl_core routines that parse
    hardware registers with versions that just publish objects, like
    devm_cxl_enumerate_decoders().
    
    Starting with:
    
    Commit 19ab69a6 ("cxl/port: Store the port's Component Register mappings in struct cxl_port")
    
    ...port register enumeration is moved into devm_cxl_add_port(). This
    conflicts with the "cxl_test avoids emulating registers stance" so
    either the port code needs to be refactored (too violent), or modified
    so that register enumeration is skipped on "fake" cxl_test ports
    (annoying, but straightforward).
    
    This conflict has happened previously and the "check for platform
    device" workaround to avoid instrusive refactoring was deployed in those
    scenarios. In general, refactoring should only benefit production code,
    test code needs to remain minimally instrusive to the greatest extent
    possible.
    
    This was missed previously because it may sometimes just cause warning
    messages to be emitted, but it can also cause test failures. The
    backport to -stable is only nice to have for clean cxl_test runs.
    
    Fixes: 19ab69a6 ("cxl/port: Store the port's Component Register mappings in struct cxl_port")
    Cc: stable@vger.kernel.org
    Reported-by: default avatarAlison Schofield <alison.schofield@intel.com>
    Reviewed-by: default avatarDave Jiang <dave.jiang@intel.com>
    Tested-by: default avatarDave Jiang <dave.jiang@intel.com>
    Link: https://lore.kernel.org/r/169476525052.1013896.6235102957693675187.stgit@dwillia2-xfh.jf.intel.comSigned-off-by: default avatarDan Williams <dan.j.williams@intel.com>
    a76b6251
port.c 50.9 KB