• Chris Wilson's avatar
    drm/i915: Update rules for writing through the LLC with the cpu · 2c22569b
    Chris Wilson authored
    As mentioned in the previous commit, reads and writes from both the CPU
    and GPU go through the LLC. This gives us coherency between the CPU and
    GPU irrespective of the attribute settings either device sets. We can
    use to avoid having to clflush even uncached memory.
    
    Except for the scanout.
    
    The scanout resides within another functional block that does not use
    the LLC but reads directly from main memory. So in order to maintain
    coherency with the scanout, writes to uncached memory must be flushed.
    In order to optimize writes elsewhere, we start tracking whether an
    framebuffer is attached to an object.
    
    v2: Use pin_display tracking rather than fb_count (to ensure we flush
    cursors as well etc) and only force the clflush along explicit writes to
    the scanout paths (i.e. pin_to_display_plane and pwrite into scanout).
    
    v3: Force the flush after hitting the slowpath in pwrite, as after
    dropping the lock the object's cache domain may be invalidated. (Ville)
    
    Based on a patch by Ville Syrjälä.
    Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    2c22569b
i915_gem_execbuffer.c 33.8 KB