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Chen Zhen authored
This patch adds the clock divisor and multiplier NI, MI values for audio sampling frequencies 44100 and 48000 Hz and PCLK 19.2 MHz. This is useful for the Odroid X2/U2 boards when the codec works in master mode and its MCLK clock is fed from the I2S CDCLK output. Signed-off-by: Chen Zhen <zhen1.chen@samsung.com> [s.nawrocki@samsung.com: edited the commit description] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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