• Ville Syrjälä's avatar
    drm/i915: Fix MSO vs. bigjoiner timings confusion · 2d053957
    Ville Syrjälä authored
    When calculating pipe_mode and when doing readout we need
    to order our steps correctly.
    
    1. We start with adjusted_mode crtc timings being populated
       with the transcoder timings (either via readout or
       compute_config(). These will be per-segment for MSO.
    2. For all other uses we want the full crtc timings so
       we ask intel_splitter_adjust_timings() to expand
       the per-segment numbers to their full glory
    3. If bigjoiner is used we the divide the full numbers
       down to per-pipe numbers using intel_bigjoiner_adjust_timings()
    
    During readout we also have to reconstruct the adjusted_mode
    normal timings (ie. not the crtc_ stuff). These are supposed
    to reflect the full timings of the display. So we grab these
    between steps 2 and 3.
    
    The "user" mode readout (mainly done for fastboot purposes)
    should be whatever mode the user would have used had they
    asked us to do a modeset. We want the full timings for this
    as the per-segment timings are not suppoesed to be user visible.
    Also the user mode normal timings hdisplay/vdisplay need to
    match PIPESRC (that is where we get our PIPESRC size
    we doing a modeset with a user supplied mode).
    
    And we end up with
    - adjusted_mode normal timigns == full timings
    - adjusted_mode crtc timings == transcoder timings
      (per-segment timings for MSO, full timings otherwise)
    - pipe_mode normal/crtc timings == pipe timings
      (full timings divided by the number of bigjoiner pipes, if any)
    - user mode normal timings == full timings with
      hdisplay/vdisplay replaced with PIPESRC size
    - user mode crtc timings == full timings
    
    Yes, that is a lot of timings. One day we'll try to remove
    some of the ones we don't actually need to keep around...
    Reviewed-by: default avatarManasi Navare <manasi.d.navare@intel.com>
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20220223131315.18016-10-ville.syrjala@linux.intel.com
    2d053957
intel_display.c 307 KB