• Chris Wilson's avatar
    drm/i915: Restore missing command flush before interrupt on BLT ring · 36d527de
    Chris Wilson authored
    We always skipped flushing the BLT ring if the request flush did not
    include the RENDER domain. However, this neglects that we try to flush
    the COMMAND domain after every batch and before the breadcrumb interrupt
    (to make sure the batch is indeed completed prior to the interrupt
    firing and so insuring CPU coherency). As a result of the missing flush,
    incoherency did indeed creep in, most notable when using lots of command
    buffers and so potentially rewritting an active command buffer (i.e.
    the GPU was still executing from it even though the following interrupt
    had already fired and the request/buffer retired).
    
    As all ring->flush routines now have the same preconditions, de-duplicate
    and move those checks up into i915_gem_flush_ring().
    
    Fixes gem_linear_blit.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35284Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    Tested-by: mengmeng.meng@intel.com
    36d527de
intel_ringbuffer.c 31.6 KB