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Jeeja KP authored
The codec registers are reset during S3. So need to reconfigure all pins and DP1.2 feature again after resume from S3. Also reprogram the required registers if the S3 was triggered during playback. In suspended state ELD notify callback is not processed, So add ELD check for all pins as well. Also turn the codec power domain OFF which is kept ON during controller resequencing and codec reenumeration. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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