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JC Kuo authored
PLLE hardware power sequencer references PEX/SATA UPHY PLL hardware power sequencers' output to enable/disable PLLE. PLLE hardware power sequencer has to be enabled only after PEX/SATA UPHY PLL's sequencers are enabled. Signed-off-by:
JC Kuo <jckuo@nvidia.com> Acked-by:
Thierry Reding <treding@nvidia.com> Acked-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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