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Daniel Mack authored
MX3 SoCs have a silicon bug which corrupts CRC calculation of multi-block transfers when connected SDIO peripheral doesn't drive the BUSY line as required by the specs. One way to prevent this is to only allow 1-bit transfers. Another way is playing tricks with the DMA engine, but this isn't mainline yet. So for now, we live with the performance drawback of 1-bit transfers until a nicer solution is found. This patch introduces a new host controller callback 'init_card' which is for now only called from mmc_sdio_init_card(). Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Volker Ernst <volker.ernst@txtr.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Michał Mirosław <mirqus@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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