Add descriptions of the SMMUs that cover the SATA controller(s)
on the AMD Seattle SOC. The CCP crypto accelerator shares its
SMMU with the second SATA controller, which is only enabled on
B1 silicon.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>