• Srinivas Pandruvada's avatar
    thermal: int340x: processor_thermal: Add interrupt configuration function · dd28a3cb
    Srinivas Pandruvada authored
    Some features like workload type prediction and power floor events
    require interrupt support to avoid polling. Here interrupts are enabled
    and disabled via sending mailbox commands. The mailbox command ID is
    0x1E for read and 0x1F for write.
    
    The interrupt configuration will require mutex protection as it involves
    read-modify-write operation. Since mutex are already used in the mailbox
    read/write functions: send_mbox_write_cmd() and send_mbox_read_cmd(),
    there will be double locking. But, this can be avoided by moving mutexes
    from mailbox read/write processing functions to the callers:
    processor_thermal_send_mbox_[read|write]_cmd().
    Signed-off-by: default avatarSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
    [ rjw: Adjust subject, fix up computation ]
    Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
    dd28a3cb
processor_thermal_mbox.c 3.56 KB