• Thierry Reding's avatar
    iommu/tegra-smmu: Parameterize number of TLB lines · 11cec15b
    Thierry Reding authored
    The number of TLB lines was increased from 16 on Tegra30 to 32 on
    Tegra114 and later. Parameterize the value so that the initial default
    can be set accordingly.
    
    On Tegra30, initializing the value to 32 would effectively disable the
    TLB and hence cause massive latencies for memory accesses translated
    through the SMMU. This is especially noticeable for isochronuous clients
    such as display, whose FIFOs would continuously underrun.
    
    Fixes: 89184651 ("memory: Add NVIDIA Tegra memory controller support")
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    11cec15b
tegra114.c 14.6 KB