• Sandipan Das's avatar
    perf docs: Add info on AMD raw event encoding · 4edb117e
    Sandipan Das authored
    AMD processors have events with event select codes and unit masks larger
    than a byte. The core PMU, for example, uses 12-bit event select codes
    split between bits 0-7 and 32-35 of the PERF_CTL MSRs as can be seen
    from /sys/bus/event_sources/devices/cpu/format/*.
    
    The Processor Programming Reference (PPR) lists the event codes as
    unified 12-bit hexadecimal values instead and the split between the bits
    is not apparent to someone who is not aware of the layout of the
    PERF_CTL MSRs.
    
    8-bit event select codes continue to work as the layout matches that of
    the PERF_CTL MSRs i.e. bits 0-7 for event select and 8-15 for unit mask.
    
    This adds more details in the perf man pages about using
    /sys/bus/event_sources/devices/*/format/* for determining the correct
    raw event encoding scheme.
    
    E.g. the "op_cache_hit_miss.op_cache_hit" event with code 0x28f and
    umask 0x03 can be programmed using its symbolic name as:
    
      $ sudo perf --debug perf-event-open stat -e op_cache_hit_miss.op_cache_hit sleep 1
      ------------------------------------------------------------
      perf_event_attr:
        type                             4
        size                             128
        config                           0x20000038f
        sample_type                      IDENTIFIER
        read_format                      TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
        disabled                         1
        inherit                          1
        enable_on_exec                   1
        exclude_guest                    1
      ------------------------------------------------------------
      [...]
    
    One might use a simple eventsel+umask combination based on what the
    current man pages say and incorrectly program the event as:
    
      $ sudo perf --debug perf-event-open stat -e r0328f sleep 1
      ------------------------------------------------------------
      perf_event_attr:
        type                             4
        size                             128
        config                           0x328f
        sample_type                      IDENTIFIER
        read_format                      TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
        disabled                         1
        inherit                          1
        enable_on_exec                   1
        exclude_guest                    1
      ------------------------------------------------------------
      [...]
    
    When it should have been based on the format from sysfs:
    
      $ cat /sys/bus/event_source/devices/cpu/format/event
      config:0-7,32-35
    
      $ sudo perf --debug perf-event-open stat -e r20000038f sleep 1
      ------------------------------------------------------------
      perf_event_attr:
        type                             4
        size                             128
        config                           0x20000038f
        sample_type                      IDENTIFIER
        read_format                      TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
        disabled                         1
        inherit                          1
        enable_on_exec                   1
        exclude_guest                    1
      ------------------------------------------------------------
      [...]
    Reviewed-by: default avatarKajol Jain <kjain@linux.ibm.com>
    Signed-off-by: default avatarSandipan Das <sandipan.das@amd.com>
    Acked-by: default avatarJiri Olsa <jolsa@redhat.com>
    Cc: Ananth Narayan <ananth.narayan@amd.com>
    Cc: Kim Phillips <kim.phillips@amd.com>
    Cc: Ravi Bangoria <ravi.bangoria@amd.com>
    Cc: Robert Richter <rrichter@amd.com>
    Cc: Santosh Shukla <santosh.shukla@amd.com>
    Link: https://lore.kernel.org/r/20211123084613.243792-1-sandipan.das@amd.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
    4edb117e
perf-record.txt 27.1 KB