Patch from Petr Vandrovec

XScale detection needs access to Interrupt Enable Register on UART.
But this register shares position with high byte clock divisor, and
previous detection steps were leaving clock divisor and not IER
selected, causing misdetection of all 16550A chips as XScale.
 
Fix this by disabling access to clock divisor at the end of previous
detection step, so chip is in same mode after each detection step.
 
Signed-off-by: Petr Vandrovec