Define the binding for compatible = "fsl,mpic", including the definition
of 4-cell interrupt specifiers.  The 3rd and 4th cells are needed to
define additional types of interrupt source outside the "normal" external
and internal interrupts in FSL SoCs.  Define error interrupt, IPIs, and
PIC timer sources.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>