• Alexey Kardashevskiy's avatar
    powerpc/powernv/ioda2: Move TCE kill register address to PE · 5780fb04
    Alexey Kardashevskiy authored
    At the moment the DMA setup code looks for the "ibm,opal-tce-kill"
    property which contains the TCE kill register address. Writing to
    this register invalidates TCE cache on IODA/IODA2 hub.
    
    This moves the register address from iommu_table to pnv_pnb as this
    register belongs to PHB and invalidates TCE cache for all tables of
    all attached PEs.
    
    This moves the property reading/remapping code to a helper which is
    called when DMA is being configured for PE and which does DMA setup
    for both IODA1 and IODA2.
    
    This adds a new pnv_pci_ioda2_tce_invalidate_entire() helper which
    invalidates cache for the entire table. It should be called after
    every call to opal_pci_map_pe_dma_window(). It was not required before
    because there was just a single TCE table and 64bit DMA was handled via
    bypass window (which has no table so no cache was used) but this is going
    to change with Dynamic DMA windows (DDW).
    Signed-off-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
    Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
    Reviewed-by: default avatarGavin Shan <gwshan@linux.vnet.ibm.com>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    5780fb04
pci-ioda.c 77.3 KB