• Aditya Swarup's avatar
    drm/i915: Add Wa_14010733141 · 5b26d57f
    Aditya Swarup authored
    The WA requires the following procedure for VDBox SFC reset:
    
    If (MFX-SFC usage is 1) {
    	1.Issue a MFX-SFC forced lock
    	2.Wait for MFX-SFC forced lock ack
    	3.Check the MFX-SFC usage bit
    	If (MFX-SFC usage bit is 1)
    		Reset VDBOX and SFC
    	else
    		Reset VDBOX
    	Release the force lock MFX-SFC
    }
    else if(HCP+SFC usage is 1) {
    	1.Issue a VE-SFC forced lock
    	2.Wait for SFC forced lock ack
    	3.Check the VE-SFC usage bit
    	If (VE-SFC usage bit is 1)
    		Reset VDBOX
    	else
    		Reset VDBOX and SFC
    	Release the force lock VE-SFC.
    }
    else
    	Reset VDBOX
    
    - Restructure: the changes to the original code flow should stay
      relatively minimal; we only need to do an extra HCP check after the
      usual VD-MFX check and, if true, switch the register/bit we're
      performing the lock on.(MattR)
    
    v2:
    - Assign unlock mask using paired_engine->mask instead of using
      BIT(paired_vecs->id). (Daniele)
    
    Bspec: 52890, 53509
    
    Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
    Cc: Matt Roper <matthew.d.roper@intel.com>
    Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Cc: Lucas De Marchi <lucas.demarchi@intel.com>
    Signed-off-by: default avatarAditya Swarup <aditya.swarup@intel.com>
    Co-developed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
    Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
    Reviewed-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210526094852.286424-2-aditya.swarup@intel.com
    5b26d57f
i915_reg.h 501 KB