-
Sanyog Kale authored
In order to achieve better DMA performance and reduce download time for firmware and library, it is recommended to disable dynamic clock and power gating. In some scenarios, DMA may wait to accumulate more data and last chunk of data never gets completed if dynamic clock and power gating is kept enabled. This patch adds support to disable/enable dynamic clock and power gating and use it during firmware and library download. Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
fc9fdd61