• Will Deacon's avatar
    iommu/arm-smmu: Fix sign-extension of upstream bus addresses at stage 1 · 5dc5616e
    Will Deacon authored
    Stage 1 translation is controlled by two sets of page tables (TTBR0 and
    TTBR1) which grow up and down from zero respectively in the ARMv8
    translation regime. For the SMMU, we only care about TTBR0 and, in the
    case of a 48-bit virtual space, we expect to map virtual addresses 0x0
    through to 0xffff_ffff_ffff.
    
    Given that some masters may be incapable of emitting virtual addresses
    targetting TTBR1 (e.g. because they sit on a 48-bit bus), the SMMU
    architecture allows bit 47 to be sign-extended, halving the virtual
    range of TTBR0 but allowing TTBR1 to be used. This is controlled by the
    SEP field in TTBCR2.
    
    The SMMU driver incorrectly enables this sign-extension feature, which
    causes problems when userspace addresses are programmed into a master
    device with the SMMU expecting to map the incoming transactions via
    TTBR0; if the top bit of address is set, we will instead get a
    translation fault since TTBR1 walks are disabled in the TTBCR.
    
    This patch fixes the issue by disabling sign-extension of a fixed
    virtual address bit and instead basing the behaviour on the upstream bus
    size: the incoming address is zero extended unless the upstream bus is
    only 49 bits wide, in which case bit 48 is used as the sign bit and is
    replicated to the upper bits.
    
    Cc: <stable@vger.kernel.org> # v4.0+
    Reported-by: default avatarVarun Sethi <varun.sethi@freescale.com>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
    5dc5616e
arm-smmu.c 50.1 KB