• Ji Sheng Teoh's avatar
    perf vendor events riscv: Add StarFive Dubhe-90 JSON file · 5ebe2f4b
    Ji Sheng Teoh authored
    Similar to StarFive's Dubhe-80, Dubhe-90 supports raw event id 0x00 -
    0x22. Reuse Dubhe-80 firmware and common json file.  The raw events are
    enabled through PMU node of DT binding.  Besides raw event, add standard
    RISC-V firmware events to support monitoring of firmware event.
    
    Example of PMU DT node:
    pmu {
    	compatible = "riscv,pmu";
    	riscv,raw-event-to-mhpmcounters =
    		/* Event ID 1-31 */
    		<0x00 0x00 0xFFFFFFFF 0xFFFFFFE0 0x00007FF8>,
    		/* Event ID 32-33 */
    		<0x00 0x20 0xFFFFFFFF 0xFFFFFFFE 0x00007FF8>,
    		/* Event ID 34 */
    		<0x00 0x22 0xFFFFFFFF 0xFFFFFF22 0x00007FF8>;
    };
    
    'perf stat' output:
    
      [root@user]# perf stat -a \
      	-e access_mmu_stlb \
      	-e miss_mmu_stlb \
      	-e access_mmu_pte_c \
      	-e rob_flush \
      	-e btb_prediction_miss \
      	-e itlb_miss \
      	-e sync_del_fetch_g \
      	-e icache_miss \
      	-e bpu_br_retire \
      	-e bpu_br_miss \
      	-e ret_ins_retire \
      	-e ret_ins_miss \
      	-- openssl speed rsa2048
      Doing 2048 bits private rsa's for 10s: 39 2048 bits private RSA's in
      10.03s
      Doing 2048 bits public rsa's for 10s: 1469 2048 bits public RSA's in
      9.47s
      version: 3.0.10
      built on: Tue Aug  1 13:47:24 2023 UTC
      options: bn(64,64)
      CPUINFO: N/A
                        sign    verify    sign/s verify/s
      rsa 2048 bits 0.257179s 0.006447s      3.9    155.1
    
       Performance counter stats for 'system wide':
    
                 31128822      access_mmu_stlb
                   10550      miss_mmu_stlb
                   18251      access_mmu_pte_c
                  274765      rob_flush
                22470560      btb_prediction_miss
                 3035839      itlb_miss
               643549060      sync_del_fetch_g
                  133013      icache_miss
                62982796      bpu_br_retire
                  287548      bpu_br_miss
                 8935910      ret_ins_retire
                    8308      ret_ins_miss
    
            20.656182600 seconds time elapsed
    Reviewed-by: default avatarLey Foon Tan <leyfoon.tan@starfivetech.com>
    Signed-off-by: default avatarJi Sheng Teoh <jisheng.teoh@starfivetech.com>
    Cc: Adrian Hunter <adrian.hunter@intel.com>
    Cc: Albert Ou <aou@eecs.berkeley.edu>
    Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
    Cc: Ian Rogers <irogers@google.com>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: Jiri Olsa <jolsa@kernel.org>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: Namhyung Kim <namhyung@kernel.org>
    Cc: Nikita Shubin <n.shubin@yadro.com>
    Cc: Palmer Dabbelt <palmer@dabbelt.com>
    Cc: Paul Walmsley <paul.walmsley@sifive.com>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: linux-riscv@lists.infradead.org
    Link: https://lore.kernel.org/r/20231122030908.2981502-1-jisheng.teoh@starfivetech.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
    5ebe2f4b
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