• Will Deacon's avatar
    arm64: mm: Fix TLBI vs ASID rollover · 5e10f988
    Will Deacon authored
    When switching to an 'mm_struct' for the first time following an ASID
    rollover, a new ASID may be allocated and assigned to 'mm->context.id'.
    This reassignment can happen concurrently with other operations on the
    mm, such as unmapping pages and subsequently issuing TLB invalidation.
    
    Consequently, we need to ensure that (a) accesses to 'mm->context.id'
    are atomic and (b) all page-table updates made prior to a TLBI using the
    old ASID are guaranteed to be visible to CPUs running with the new ASID.
    
    This was found by inspection after reviewing the VMID changes from
    Shameer but it looks like a real (yet hard to hit) bug.
    
    Cc: <stable@vger.kernel.org>
    Cc: Marc Zyngier <maz@kernel.org>
    Cc: Jade Alglave <jade.alglave@arm.com>
    Cc: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
    Signed-off-by: default avatarWill Deacon <will@kernel.org>
    Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    Link: https://lore.kernel.org/r/20210806113109.2475-2-will@kernel.orgSigned-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    5e10f988
tlbflush.h 11.6 KB