• Daniele Ceraolo Spurio's avatar
    drm/i915: limit double GT reset to pre-MTL · 625af472
    Daniele Ceraolo Spurio authored
    Commit 3db9d590 ("drm/i915/gt: Reset twice") modified the code to
    always hit the GDRST register twice when doing a reset, with the
    reported aim to fix invalid post-reset engine state on some platforms
    (Jasperlake being the only one actually mentioned).
    
    This is a problem on MTL, due to the fact that we have to apply a time
    consuming WA (coming in the next patch) every time we hit the GDRST
    register in a way that can include the GSC engine. Even post MTL, the
    expectation is that we'll have some work to do before and after hitting
    the GDRST if the GSC is involved.
    
    Since the issue requiring the double reset seems to be limited to older
    platforms, instead of trying to handle the double-reset on MTL and
    future platforms it is just easier to turn it off. The default on MTL is
    also for GuC to own engine reset, with i915 only covering full-GT reset.
    Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Cc: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Andi Shyti <andi.shyti@linux.intel.com>
    Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
    Cc: John Harrison <John.C.Harrison@Intel.com>
    Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20230323231857.2194435-1-daniele.ceraolospurio@intel.com
    625af472
intel_reset.c 40.5 KB