• Peter Zijlstra's avatar
    perf/x86: Support constraint ranges · 63b79f6e
    Peter Zijlstra authored
    Icelake extended the general counters to 8, even when SMT is enabled.
    However only a (large) subset of the events can be used on all 8
    counters.
    
    The events that can or cannot be used on all counters are organized
    in ranges.
    
    A lot of scheduler constraints are required to handle all this.
    
    To avoid blowing up the tables add event code ranges to the constraint
    tables, and a new inline function to match them.
    Originally-by: default avatarAndi Kleen <ak@linux.intel.com>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> # developer hat on
    Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
    Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> # maintainer hat on
    Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
    Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
    Cc: Jiri Olsa <jolsa@redhat.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Stephane Eranian <eranian@google.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Vince Weaver <vincent.weaver@maine.edu>
    Cc: acme@kernel.org
    Cc: jolsa@kernel.org
    Link: https://lkml.kernel.org/r/20190402194509.2832-8-kan.liang@linux.intel.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
    63b79f6e
ds.c 55.5 KB