• Vladimir Zapolskiy's avatar
    arm: dts: lpc32xx: move USB controller subdevices into own device node · aa29efb4
    Vladimir Zapolskiy authored
    NXP LPC32xx SoC has one USB OTG controller, which is supposed to work
    with an external phy (default is NXP ISP1301).
    
    Practically the USB controller contains 5 subdevices:
    - host controller   0x3102 0000 -- 0x3102 00FF
    - OTG controller    0x3102 0100 -- 0x3102 01FF
    - device controller 0x3102 0200 -- 0x3102 02FF
    - I2C controller    0x3102 0300 -- 0x3102 03FF
    - clock controller  0x3102 0F00 -- 0x3102 0FFF
    
    The USB controller can be considered as a "bus", because the
    subdevices above are relatively independent, for example I2C
    controller is the same as other two general purpose I2C controllers
    found on SoC.
    
    The change is not intended to modify any logic, but it rearranges
    existing device nodes, in future it is planned to add a USB clock
    controller device node into the same group.
    Signed-off-by: default avatarVladimir Zapolskiy <vz@mleia.com>
    aa29efb4
phy3250.dts 3.63 KB