In the process we convert the driver to read registers one at a time
when initialising the cache. This has the effect of working around
limitations in the sizes of I2C transactions which can be done by some
CPUs. Due to the sparseness of the register map the overhead from this
should be minimual unless I2C transactions are very expensive to start.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>