• Christophe Leroy's avatar
    powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX · 1e35eba4
    Christophe Leroy authored
    As spotted and explained in commit c12ab8db ("powerpc/8xx: Fix
    Oops with STRICT_KERNEL_RWX without DEBUG_RODATA_TEST"), the selection
    of STRICT_KERNEL_RWX without selecting DEBUG_RODATA_TEST has spotted
    the lack of the DIRTY bit in the pinned kernel data TLBs.
    
    This problem should have been detected a lot earlier if things had
    been working as expected. But due to an incredible level of chance or
    mishap, this went undetected because of a set of bugs: In fact the
    DTLBs were not pinned, because instead of setting the reserve bit
    in MD_CTR, it was set in MI_CTR that is the register for ITLBs.
    
    But then, another huge bug was there: the physical address was
    reset to 0 at the boundary between RO and RW areas, leading to the
    same physical space being mapped at both 0xc0000000 and 0xc8000000.
    This had by miracle no consequence until now because the entry was
    not really pinned so it was overwritten soon enough to go undetected.
    
    Of course, now that we really pin the DTLBs, it must be fixed as well.
    
    Fixes: f76c8f6d ("powerpc/8xx: Add function to set pinned TLBs")
    Cc: stable@vger.kernel.org # v5.8+
    Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
    Depends-on: c12ab8db ("powerpc/8xx: Fix Oops with STRICT_KERNEL_RWX without DEBUG_RODATA_TEST")
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    Link: https://lore.kernel.org/r/a21e9a057fe2d247a535aff0d157a54eefee017a.1636963688.git.christophe.leroy@csgroup.eu
    1e35eba4
head_8xx.S 22 KB