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Sylvain Lemieux authored
The change setup the peripheral clock (PERIPH_CLK) as the default parent clock for PWM1 & PWM2. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
1754906f
The change setup the peripheral clock (PERIPH_CLK) as the default parent clock for PWM1 & PWM2. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>