• Daniel Vetter's avatar
    drm/i915: Improve irq handling after gpu resets · 78ad455f
    Daniel Vetter authored
    Currently we do a full re-init of all interrupts after a gpu hang.
    Which is pretty bad since we don't restore the interrupts we've
    enabled at runtime correctly. Even with that addressed it's rather
    horribly race.
    
    But on g4x and later we only reset the gt and not the entire gpu.
    Which means we only need to reset the GT interrupt bits. Which has the
    nice benefit that vblank waits, pipe CRC interrupts and everything
    else display related just keeps on working.
    
    The downside is that gt interrupt handling (i.e. ring->get/put_irq) is
    still racy. But as long as the gpu hang reliably wakes all waters and
    we have a short time where the refcount drops to 0 we'll recover. So
    not that bad really.
    
    v2: Ville noticed that GTIMR and PMIMR don't get cleared, only the
    subordinate per-ring registers. So let's rip out all the interrupt dancing.
    The FIXME comment is still required though since the ring irq handling
    happens at the per-ring interrupt mask registers, too.
    
    Testcase: igt/kms_flip/vblank-vs-hang
    Testcase: igt/kms_pipe_crc_basic/hang-*
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    78ad455f
i915_drv.c 43.8 KB