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Sai Prakash Ranjan authored
As per interrupt documentation for SM8350 SoC, the polarity for level triggered PMU interrupt is low, fix this. Fixes: b7e8f433 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/ca57409198477f7815e32a6a7467dcdc9b93dc4f.1613468366.git.saiprakash.ranjan@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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